Silicon carbide and related wide-bandgap transistors on semi insulating epitaxy
View Patent ↗A method of making a semi-insulating epitaxial layer includes implanting a substrate or a first epitaxial layer formed on the substrate with boron ions to form a boron implanted region on a surface of the substrate or on a surface of the first epitaxial layer, and growing a second epitaxial layer on the boron implanted region of the substrate or on the boron implanted region of the first epitaxial layer to form a semi-insulating epitaxial layer.
1. A microelectronic device, comprising:
a substrate;
a boron implanted region on a surface of the substrate;
a silicon carbide epitaxial layer on the boron implanted region, the silicon carbide epitaxial layer comprising a semi-insulating region adjacent the boron implanted region, the semi-insulating region comprising boron and boron-related D-center defects; and
a first semiconductor device on the silicon carbide Epitaxial layer.
2. The device of claim 1 , wherein the first semiconductor device is a high frequency device.
3. The device of claim 1 , wherein the substrate is a conductor.
4. The device of claim 1 , wherein the substrate is a p-type substrate or an n-type substrate.
5. The device of claim 1 , wherein the first semiconductor device comprises a metal oxide field effect transistor, a bipolar junction transistor or a junction field effect transistor.
6. The device of claim 1 , further comprising a second semiconductor device on the semi-insulating silicon carbide layer.
7. The device of claim 6 , wherein the second semiconductor device is physically isolated from the first semiconductor device.
8. The device of claim 1 , wherein the silicon carbide epitaxial layer is an n-type epitaxial layer.
9. The device of claim 1 , wherein the substrate is a SiC substrate.
10. A microelectronic device, comprising:
a substrate;
a first silicon carbide epitaxial layer on the substrate, the first silicon carbide epitaxial layer comprising a boron implanted region on a surface opposite the substrate and a first semi-insulating region adjacent the boron implanted region, the first semi-insulating region comprising boron and boron-related D-center defects;
a second silicon carbide epitaxial layer on the boron implanted region, the second silicon carbide epitaxial layer comprising a second semi-insulating region adjacent the boron implanted region, the second semi-insulating region comprising boron and boron-related D-center defects; and
a first semiconductor device on the second silicon carbide epitaxial layer.
11. The device of claim 10 , wherein the first and second silicon carbide epitaxial layers are each n-type epitaxial layers and the substrate is a p-type substrate.
12. The device of claim 10 , wherein the substrate is a SiC substrate.
13. The device of claim 10 , wherein the first semiconductor device is a high frequency device.
14. The device of claim 10 , wherein the substrate is a conductor.
15. The device of claim 10 , wherein the substrate is a p-type substrate or an n-type substrate.
16. The device of claim 10 , wherein the first semiconductor device comprises a metal oxide field effect transistor, a bipolar junction transistor or a junction field effect transistor.
17. The device of claim 10 , further comprising a second semiconductor device on the second silicon carbide epitaxial layer.
18. The device of claim 17 , wherein the second semiconductor device is physically isolated from the first semiconductor device.