IP Library Granted Patent US 7,537,968
Granted Patent B2
US 7,537,968 · App. 11/765,254 · Granted May 26, 2009

Junction diode with reduced reverse current

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Quick Facts
Patent No.
US 7,537,968
App. No.
11/765,254
Granted
May 26, 2009
Kind
B2
Abstract

A method for annealing a diode formed of a silicon-germanium alloy that minimizes leakage current is disclosed. The method includes the steps of forming semiconductor pillars of an alloy of silicon and germanium; heating the pillars at a first temperature for at least 30 minutes, and then heating the pillars at a second temperature higher than the first temperature of the alloy for up to 120 seconds. The invention further includes a monolithic three dimensional memory array of a plurality of p-i-n diodes, the p-i-n diodes being formed of a silicon-germanium alloy that have been subjected to a two-stage heating process.

Claims (59)

1. A method for forming a junction diode, the method comprising:

a) forming semiconductor pillars, the pillars comprising an amorphous alloy of silicon and germanium;

b) heating said pillars at a first temperature for at least 30 minutes; and

c) heating said pillars at a second temperature, wherein the second temperature is higher than the first temperature, for about 120 seconds or less;

wherein the step of heating the pillars at the first temperature is conducted at a temperature of about 675° C. to about 700° C.

2. The method of claim 1 , wherein the step of heating the pillars at the first temperature is approximately 670° C. for approximately 60 minutes.

3. The method of claim 1 , wherein the alloy comprises Si 1-x Ge x where x is between 0.01 and 0.99.

4. The method of claim 1 , wherein the alloy is Si 1-x Ge x , where x is about 2.0.

5. The method of claim 1 , wherein the step of heating said pillars at the first temperature is conducted for at least 60 minutes.

6. A method for forming a junction diode, the method comprising:

a) forming semiconductor pillars, the pillars comprising an amorphous alloy of silicon and germanium;

b) heating said pillars at a first temperature for at least 30 minutes; and

c) heating said pillars at a second temperature, wherein the second temperature is higher than the first temperature, for about 120 seconds or less;

wherein the step of heating the pillars at the second temperature is conducted at a temperature of about 550° C. to about 850° C. for up to about 120 seconds.

7. The method of claim 6 , wherein the step of heating the pillars at the second temperature is conducted at approximately 800° C. for about 10 to about 120 seconds.

8. The method of claim 6 , wherein the alloy is Si 1-x Ge x where x is between 0.01 and 0.99.

9. The method of claim 6 , wherein the alloy is approximately Si 0.8 Ge 0.2 .

10. The method of claim 6 , wherein the step of heating said pillars at the first temperature is conducted for at least 60 minutes.

11. A method for forming a monolithic three dimensional memory array, the method comprising:

a) forming semiconductor pillars comprising Si 1-x Ge x where x is between 0.01 and 0.99;

b) heating said pillars at a first temperature from approximately 430° C. to approximately 700° C. for between approximately 60minutes and approximately 24 hours; and then

c) heating said pillars at a second temperature from approximately 550° C. to approximately 850° C. for up to approximately 120 seconds,

the monolithic three dimensional memory array comprising a first memory level monolithically formed above a substrate and a second memory level monolithically formed above the first memory level.

12. The method of claim 11 wherein the substrate comprises monocrystalline silicon.

13. The method of claim 11 wherein each semiconductor pillar comprises a p-i-n diode.

14. A method for forming a p-i-n diode, the method comprising the sequential steps of:

a) first forming amorphous semiconductor pillars, the pillars comprising an alloy of silicon and germanium;

b) then heating said pillars at a first temperature for at least 30 minutes; and

c) then heating said pillars at a second temperature higher than the first temperature for no more than 120 seconds;

wherein the step of heating said pillars at the first temperature is conducted for at least 60 minutes; and

wherein the step of heating said pillars at the first temperature is conducted at a temperature of about 375° C. to about 625° C.

15. The method of claim 14 , wherein the alloy is Si 1-x Ge x1 where x is between 0.01 and 0.99.

16. The method of claim 14 , wherein the alloy is approximately Si 0.8 Ge 0.2. .

17. A method for forming a p-i-n diode, the method comprising the sequential steps of:

a) first forming amorphous semiconductor pillars, the pillars comprising an alloy of silicon and germanium;

b) then heating said pillars at a first temperature for at least 30 minutes; and

c) then heating said pillars at a second temperature higher than the first temperature for no more than 120 seconds;

wherein the step of heating said pillars at the first temperature is conducted for at least 60 minutes; and

wherein the step of heating the pillars at the second temperature is conducted at a temperature of about 500° C. to about 850° C. for up to about 120 seconds.

18. The method of claim 17 , wherein the alloy is Si 1-x Ge x where x is between 0.01 and 0.99.

19. The method of claim 17 , wherein the alloy is approximately Si 0.8 Ge 0.2. .

20. A method for forming a monolithic three dimensional memory array, the method comprising:

a) forming amorphous semiconductor pillars, the pillars comprising an alloy of silicon and germanium;

b) heating said pillars at a first temperature for at least 30 minutes; and

c) heating said pillars at a second temperature higher than the first temperature of said alloy for no more than 120 seconds,

the monolithic three dimensional memory array comprising a first memory level monolithically formed above a substrate and a second memory level monolithically formed above the first memory level;

wherein the step of heating the pillars at the first temperature is conducted at a temperature of about 375° C. to about 670° C.

21. The method of claim 20 , wherein the alloy is Si 1-x Ge x where x is between 0.01 and 0.99.

22. The method of claim 20 , wherein the alloy is approximately Si 0.8 Ge 0.2. .

23. The method of claim 20 , wherein the step of heating said pillars at the first temperature is conducted for at least 60 minutes.

24. A method for forming a monolithic three dimensional memory array, the method comprising:

a) forming amorphous semiconductor pillars, the pillars comprising an alloy of silicon and germanium;

b) heating said pillars at a first temperature for at least 30 minutes; and

c) heating said pillars at a second temperature higher than the first temperature of said alloy for no more than 120 seconds,

the monolithic three dimensional memory array comprising a first memory level monolithically formed above a substrate and a second memory level monolithically formed above the first memory level;

wherein the step of heating the pillars at the second temperature is conducted at a temperature of about 550° C. to about 850° C. for about 10 to about 120 seconds.

25. The method of claim 24 , wherein the alloy is Si 1-x Ge x where x is between 0.01 and 0.99.

26. The method of claim 24 , wherein the alloy is approximately Si 0.8 Ge 0.2. .

27. The method of claim 24 , wherein the step of heating said pillars at the first temperature is conducted for at least 60 minutes.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2025
From: SANDISK TECHNOLOGIES, INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 070778/0160 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038809/0600 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 25, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038520/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: SANDISK 3D LLC.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038300/0665 →