Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
View Patent ↗In some aspects, a method of forming a memory cell is provided that includes (1) forming a first conductor above a substrate; (2) forming a diode above the first conductor; (3) forming a reversible resistance-switching element above the first conductor using a selective deposition process; and (4) forming a second conductor above the diode and the reversible resistance-switching element. Numerous other aspects are provided.
1. A method of forming a memory cell comprising:
forming a steering element above a substrate; and
selectively forming a reversible resistance-switching element coupled to the steering element using a selective deposition process without etching the reversible resistance-switching element by:
a) forming a conductive layer;
b) etching the conductive layer to form an etched surface; and
c) depositing the reversible resistance-switching element on the etched surface using any one of an electroless deposition or an electroplating process.
2. The method of forming a memory cell according to claim 1 wherein forming the steering element comprises forming a diode.
3. The method of forming a memory cell according to claim 1 wherein forming the steering element comprises forming a polycrystalline diode.
4. The method of forming a memory cell according to claim 1 wherein forming the steering element comprises forming a vertical polycrystalline diode.
5. The method of forming a memory cell according to claim 1 wherein forming the steering element comprises forming a vertical polycrystalline diode having polycrystalline material that is in a low-resistivity state.
6. The method of forming a memory cell according to claim 1 wherein forming the steering element comprises forming a p-n diode or a p-i-n diode.
7. The method of forming a memory cell according to claim 1 wherein forming the steering element comprises forming a thin film transistor.
8. The method of forming a memory cell according to claim 1 wherein forming the steering element comprises forming a thin film, metal oxide semiconductor field effect transistor (MOSFET).
9. The method of forming a memory cell according to claim 1 wherein forming the reversible resistance-switching element comprises forming at least one of NiO, NiO x , and NiO x P y .
10. The method of forming a memory cell according to claim 9 wherein forming the reversible resistance-switching element comprises forming a reversible resistance-switching element having an oxide thickness of about 1000 angstroms or less.
11. The method of forming a memory cell according to claim 10 wherein forming the reversible resistance-switching element comprises forming a reversible resistance-switching element having an oxide thickness of about 500 angstroms or less.
12. The method of forming a memory cell according to claim 1 wherein forming the reversible resistance-switching element comprises selectively forming a nickel-containing layer.
13. The method of forming a memory cell according to claim 12 wherein forming the nickel-containing layer comprises selectively forming a NiO—, NiO x — or NiO x P y -containing layer.
14. The method of forming a memory cell according to claim 13 further comprising annealing or oxidizing the NiO—, NiO x — or NiO x P y -containing layer.
15. The method of forming a memory cell according to claim 12 wherein forming the nickel-containing layer comprises selectively forming a Ni or Ni x P y layer and further comprising oxidizing the Ni or Ni x P y layer.
16. The method of forming a memory cell according to claim 1 further comprising coupling the steering element and reversible resistance-switching element in series.
17. The method of forming a memory cell according to claim 1 wherein forming the reversible resistance-switching element comprises forming at least one of Ta 2 O 5 , Nb 2 O 5 , Al 2 O 3 , V 2 O 5 , CoO, (Co x Ni y ) O z , and TiO 2 .
18. A method of forming a memory cell comprising:
forming a thin film transistor having a source region and a drain region above a substrate;
forming a first conductor coupled to the source region or the drain region of the transistor;
selectively forming a reversible resistance-switching element without etching the reversible resistance-switching element, the reversible resistance-switching element including a nickel oxide layer above the first conductor and coupled to the thin film transistor, wherein selectively forming the reversible resistance switching element includes:
a) forming a conductive layer;
b) etching the conductive layer to form an etched surface; and
c) depositing the reversible resistance-switching element on the etched surface using any one of an electroless deposition or an electroplating process; and
forming a second conductor above the reversible resistance-switching element.
19. The method of forming a memory cell according to claim 18 wherein forming the thin film transistor comprises forming an n-channel or a p-channel thin film, metal oxide semiconductor field effect transistor.
20. The method of forming a memory cell according to claim 18 wherein selectively forming the reversible resistance-switching element comprises forming a reversible resistance-switching element having an oxide thickness of about 500 angstroms or less.