Low power voltage detection circuit and method therefor
View Patent ↗In one embodiment, a low power voltage detection circuit includes a first voltage detection device that receives power from an input voltage and a second voltage detection device receives power from an output of the low power voltage detection circuit.
1. A low power under-voltage detection method comprising:
coupling a first voltage detection circuit of an under-voltage detection circuit to continuously receive an input voltage, to decouple the input voltage from an output of the under-voltage detection circuit responsively to the input voltage being less than a first value and to couple the input voltage to the output of the under-voltage detection circuit as an output voltage responsively to the input voltage being no less than the first value; and
coupling a second voltage detection circuit of the under-voltage detection circuit to receive a signal that is representative of the input voltage responsively to coupling the input voltage to the output, and to decouple the input voltage from the output responsively to the input voltage being less than a second value.
2. The method of claim 1 wherein coupling the first voltage detection circuit of the under-voltage detection circuit to continuously receive the input voltage includes enabling a voltage regulator to couple the input voltage to the output and form the output voltage responsively to the first voltage detection circuit detecting that the input voltage is no less than the first value.
3. The method of claim 2 wherein coupling the second voltage detection circuit of the under-voltage detection circuit to receive the signal that is representative of the input voltage responsively to coupling the input voltage to the output includes coupling the output voltage to the second voltage detection circuit.
4. A low power voltage detection circuit comprising:
a first voltage detection circuit coupled to continuously receive power from an input voltage and configured to form an enable signal responsively to a first threshold value of the input voltage;
an output voltage controller coupled to receive the input voltage and form an output voltage on an output of the low power voltage detection circuit responsively to the enable signal; and
a comparator circuit coupled to receive power from the output voltage controller and form a second threshold value, the comparator circuit coupled to disable the output voltage controller responsively to the input voltage being no greater than the second threshold value wherein the second threshold value is less than the first threshold value.
5. The low power voltage detection circuit of claim 4 wherein the first voltage detection circuit requires less operating current than the comparator circuit.
6. The low power voltage detection circuit of claim 4 wherein the output voltage controller is a linear regulator that is configured: to selectively form the output voltage from the input voltage responsively to the first threshold value of the input voltage and is configured to selectively inhibit forming the output voltage from the input voltage responsively to the second threshold value of the input voltage.
7. The low power voltage detection circuit of claim 6 wherein the linear regulator includes a reference generator coupled to selectively form a reference voltage of the linear regulator responsively to the first threshold value of the input voltage.
8. The low power voltage detection circuit of claim 4 wherein the first voltage detection circuit is configured to change the first threshold value to a third threshold value responsively to the first threshold value of the input voltage.
9. The low power voltage detection circuit of claim 8 wherein the comparator circuit is operably coupled to reset the third threshold value of the first voltage detection circuit back to the first threshold value responsively to the input voltage being no greater than the third threshold value.
10. The low power voltage detection circuit of claim 4 further including a PWM controller coupled to receive the output voltage.
11. The low power voltage detection circuit of claim 4 wherein the comparator circuit is coupled to the output of the low power voltage detection circuit to receive operating power from the output voltage.
12. The low power voltage detection circuit of claim 4 wherein the first voltage detection circuit includes;
a first JFET transistor having a drain coupled to receive the input voltage, a gate coupled to a voltage return of the low power voltage detection circuit, and a source;
a second JFET transistor having a drain coupled to receive the source of the first JFET transistor, a gate coupled to the voltage return, and a source;
a first MOS transistor having a drain coupled to the source of the second JFET transistor, a source coupled to the voltage return, and a gate; and
a second MOS transistor having a source coupled to receive the input voltage, a drain coupled to the gate of the first MOS transistor, and a gate coupled to the drain of the first JFET transistor.
13. A method of forming a low power voltage detection circuit comprising:
coupling the low power voltage detection circuit to receive an input voltage and provide an output voltage to power other circuits coupled to an output of the low power voltage detection circuit;
configuring the low power voltage detection circuit to detect the input voltage being less than a first threshold value and responsively inhibit supplying the output voltage; and
configuring the low power voltage detection circuit to detect the input voltage being no less than the first threshold value and responsively supply the output voltage.
14. The method of claim 13 wherein configuring the low power voltage detection circuit to detect the input voltage being less than the first threshold value and responsively inhibit supplying the output voltage includes configuring the low power under voltage detection circuit to inhibit supplying power to a regulator of the low power under voltage detection circuit.
15. The method of claim 14 wherein configuring the low power under voltage detection circuit to detect the input voltage being no less than the first threshold value and responsively supply the output voltage includes configuring the low power under voltage detection circuit to detect the input voltage being no less than the first threshold value and responsively couple power to the regulator.
16. The method of claim 14 wherein configuring the low power under voltage detection circuit to detect the input voltage being no less than the first threshold value and responsively couple power to the regulator includes configuring the low power under voltage detection circuit to selectively couple a reference voltage to the regulator and configuring the regulator to responsively form the output voltage.
17. The method of claim 13 wherein coupling the low power voltage detection circuit to receive the input voltage and provide the output voltage to power other circuits coupled to the output of the low power voltage detection circuit includes coupling a voltage regulator in series between the input voltage and the output to selectively receive power from the input voltage and responsively form the output voltage.
18. The method of claim 13 wherein coupling the low power voltage detection circuit to receive the input voltage and provide the output voltage to power other circuits coupled to the output of the low power voltage detection circuit includes coupling a first voltage detection circuit to receive power from the input voltage and coupling a second voltage detection circuit to receive power from the output voltage.
19. The method of claim 18 wherein coupling the second voltage detection circuit to receive power from the output voltage includes coupling a comparator to receive power from the output voltage.