Series-shunt switch with thermal terminal
View Patent ↗A series-shunt switch is provided. The switch includes a PIN diode having an input electrical terminal, an output electrical terminal and a thermal terminal. The thermal terminal is configured to provide continuity of diode thermal ground with respect to a circuit thermal ground node.
1. A PIN diode comprising:
an input electrical terminal;
an output electrical terminal; and
a thermal terminal, the thermal terminal configured to be (i) in electrical and RF conductive contact with said input electrical terminal and said output electrical terminal and (ii) in thermal conductive contact with a circuit thermal ground node, wherein said circuit thermal ground node is electrically and RF insulated from said input electrical terminal, said output electrical terminal and said thermal terminal.
2. A PIN diode in accordance with claim 1 , further comprising a surface configured to be embedded into a substrate of semiconductor material, the surface comprising the input electrical terminal, the output electrical terminal and the thermal terminal.
3. A PIN diode in accordance with claim 1 , further comprising an RF/DC ground terminal, wherein the thermal terminal is configured to provide RF isolation with respect to the RF/DC ground terminal.
4. A PIN diode in accordance with claim 1 , wherein the PIN diode is configured for operation in connection with a series-shunt SPST switch.
5. A PIN diode in accordance with claim 1 , wherein the thermal ground node comprises a heat sink.
6. A PIN diode in accordance with claim 1 , wherein the thermal terminal comprises a thermally conductive dielectric region formed from boron nitride.
7. A series-shunt SPST switch connection arrangement, the connection arrangement comprising at least one PIN diode configured to be embedded into a composite material of silicon semiconductor and glass, and including an input electrical terminal, an output electrical terminal and a thermal terminal, with the thermal terminal configured to be (i) in electrical and RF conductive contact with said input electrical terminal and said output electrical terminal, (ii) in thermal conductive contact with a circuit thermal ground node, wherein said circuit thermal ground node is electrically and RF insulated from said input electrical terminal, said output electrical terminal and said thermal terminal, and (iii) provide a continuous thermal ground path between a PIN diode thermal node and said circuit thermal ground node.
8. A connection arrangement in accordance with claim 7 , further comprising an RF/DC ground terminal, wherein the thermal terminal is configured to provide RF isolation between the thermal ground path and the RF/DC ground terminal.
9. A connection arrangement in accordance with claim 7 , wherein the thermal terminal is connected to a thermal via configured to be disposed in the substrate of semiconductor material.
10. A connection arrangement in accordance with claim 9 , wherein the PIN diode is configured to be disposed over the thermal via relative to a plane of the substrate of semiconductor material.
11. A connection arrangement in accordance with claim 9 , wherein the thermal via is solid filled and comprises a thermally conductive dielectric material.
12. A connection arrangement in accordance with claim 7 , further comprising an RF line to connect at least one of the input and output terminals to an RF circuit.
13. A connection arrangement in accordance with claim 7 , wherein the thermal ground node comprises a heat sink.
14. A connection arrangement in accordance with claim 7 , further comprising a plurality of PIN diodes including a series PIN diode and a shunt PIN diode.
15. A method of providing a series-shunt SPST switch, the method comprising:
providing a PIN diode in a substrate of semiconductor material, the PIN diode comprising an input electrical terminal, an output electrical terminal and a thermal terminal; and
configuring the thermal terminal to be (i) in electrical and RF conductive contact with said input electrical terminal and said output electrical terminal, (ii) in thermal conductive contact with a circuit thermal ground node, wherein said circuit thermal ground node is electrically and RF insulated from said input electrical terminal, said output electrical terminal and said thermal terminal, and (iii) provide a continuous thermal ground path between a PIN diode thermal node and said circuit thermal ground node.
16. A method in accordance with claim 15 , further comprising providing an RF/DC ground terminal, wherein the thermal terminal is configured to provide RF isolation between the thermal ground path and the RF/DC ground terminal.
17. A method in accordance with claim 15 , further comprising providing a thermal via configured to be disposed in the substrate of the semiconductor material, wherein the thermal terminal is connected to the thermal via and the thermal via is about two millimeter to three millimeters below a top surface of the substrate.
18. A method in accordance with claim 17 , wherein the PIN diode is configured to be disposed over the thermal via relative to the plane of the substrate of semiconductor material.
19. A method in accordance with claim 17 , wherein the thermal via is a region in an area etched from the semiconductor material and includes a solid filled thermal material.
20. A method in accordance with claim 15 , wherein the thermal ground node comprises a heat sink.