IP Library Granted Patent US 7,757,930
Granted Patent B2
US 7,757,930 · App. 11/837,168 · Granted Jul 20, 2010

Fabrication method of semiconductor integrated circuit device

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Quick Facts
Patent No.
US 7,757,930
App. No.
11/837,168
Granted
Jul 20, 2010
Kind
B2
Abstract

Productivity is to be improved in assembling a semiconductor integrated circuit device. A matrix substrate is provided and semiconductor chips are disposed on a first heating stage, then the matrix substrate is disposed above the semiconductor chips on the first heating stage, subsequently the semiconductor chips and the matrix substrate are bonded to each other temporarily by thermocompression bonding while heating the chips directly by the first heating stage, thereafter the temporarily bonded matrix substrate is disposed on a second heating stage adjacent to the first heating stage, and then on the second heating stage the semiconductor chips are thermocompression-bonded to the matrix substrate while being heated directly by the second heating stage.

Claims (13)

1. A method of fabricating a semiconductor integrated circuit device, comprising the steps of:

(a) providing a substrate;

(b) disposing a plurality of semiconductor chips over a stage;

(c) disposing the substrate over first main surface sides of the plural semiconductor chips; and

(d) pressurizing the plural semiconductor chips correspondingly by a plurality of pressure blocks while heating the semiconductor chips from second main surface sides of the chips by the stage, the plural pressure blocks being supported each independently movably in corresponding relation to the semiconductor chips, thereby thermocompression bonding the semiconductor chips all together to the substrate,

wherein said step (d) comprises:

(d1) pressurizing the plural semiconductor chips by a first pressure; and

(d2) after the step (d1), pressurizing the plural semiconductor chips by a second pressure which is higher than said first pressure, and wherein in the step (d1) the semiconductor chips are bonded to the substrate by a temporary bonding, with a main bonding being performed in the step (d2).

2. A method according to claim 1 , wherein the heating in the step (d) is performed also from the first main surface sides of the semiconductor chips.

3. A method according to claim 1 , wherein the heating from the second main surface sides of the semiconductor chips is performed directly without interposition of the substrate.

4. A method according to claim 1 , wherein the substrate is an organic wiring substrate.

5. A method according to claim 4 , wherein the temperature of the heating from the second main surface sides of the semiconductor chips is lower than the glass transition temperature of an organic resin which constitutes a principal portion of the organic wiring substrate.

6. A method according to claim 1 , wherein the plural semiconductor chips are pressurized by the plural pressure blocks in the step (d2), and in the step (d1) the semiconductor chips are pressurized by the first pressure one-by-one.

Assignments (6)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Sep 20, 2017
From: RENESAS EASTERN JAPAN SEMICONDUCTOR, INC.
To: RENESAS NORTHERN JAPAN SEMICONDUCTOR, INC.
Reel/Frame 043638/0393 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2017
From: MAKI, HIROSHI; TANI, YUKIO
To: RENESAS TECHNOLOGY CORP.; RENESAS EASTERN JAPAN SEMICONDUCTOR, INC.
Reel/Frame 042356/0327 →
CHANGE OF NAME Recorded May 12, 2017
From: RENESAS SEMICONDUCTOR KYUSHU YAMAGUCHI CO., LTD.
To: RENESAS SEMICONDUCTOR PACKAGE & TEST SOLUTIONS CO., LTD.
Reel/Frame 042484/0880 →
MERGER Recorded May 12, 2017
From: RENESAS NORTHERN JAPAN SEMICONDUCTOR, INC.
To: RENESAS SEMICONDUCTOR KYUSHU YAMAGUCHI CO., LTD.
Reel/Frame 042609/0807 →
MERGER Recorded Jul 23, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024733/0314 →