Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packages
View Patent ↗A method for making a semiconductor multi-package module includes; providing a lower molded package including a lower substrate and a die, affixing an upper molded package including an upper substrate onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
1. A method for making a multipackage module, comprising:
providing a bottom package including at least one die on a lower side of a bottom package substrate,
stacking a top package over an upper surface of the bottom package substrate with the top package including an upper die stacked over a lower die with a spacer in between, the upper die, spacer, and the lower die over a top package substrate and in a molding material, and
forming wire bonds between the top package substrate and the bottom package substrate.
2. The method of claim 1 wherein stacking the top package over the bottom package comprises:
applying an adhesive onto an upper surface of the bottom package; and
placing the top package onto the adhesive.
3. The method of claim 2 wherein the adhesive is a curable adhesive, and further comprising curing the adhesive.
4. The method of claim 1 further comprising providing the top package including:
testing packages for a performance and reliability requirement; and
selecting the top package as meeting the requirement.
5. The method of claim 1 , further comprising attaching second-level interconnect balls onto the bottom package substrate.
6. The method of claim 1 , further comprising encapsulating the top package and the wire bonds in a molding.