IP Library Granted Patent US 7,397,070
Granted Patent B2
US 7,397,070 · App. 11/864,327 · Granted Jul 8, 2008

Self-aligned transistor

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Quick Facts
Patent No.
US 7,397,070
App. No.
11/864,327
Granted
Jul 8, 2008
Kind
B2
Abstract

In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor.

Claims (12)

1. A contact structure for a transistor comprising:

a semiconductor substrate having a first surface;

a first doped region on the first surface;

a second doped region on the first surface and electrically contacting the first doped region;

a first conductor having a second surface overlying the first doped region, the first conductor having a sidewall; and

a second conductor underlying a portion of the first conductor and extending from the second surface to electrically contact the first doped region wherein the second conductor is not on the sidewall of the first conductor an alignment spacer that is substantially coplanar to the sidewall of the first conductor wherein the sidewall of the first conductor is substantially perpendicular to the first surface, wherein the alignment spacer has an opening overlying the second doped region.

2. The contact structure of claim 1 further including a third conductor overlying and electrically contacting the second doped region wherein the second conductor has substantially vertical sidewalls.

3. The contact structure of claim 2 wherein the second doped region is one of an emitter or a base of a bipolar transistor.

4. The contact structure of claim 1 further including a first protective layer on a third surface of the first conductor wherein the third surface is opposite the second surface.

5. The contact structure of claim 1 further including a protective spacer on the sidewall of the first conductor.

6. The contact structure of claim 1 further including a dielectric overlying the first conductor and a protective spacer on a sidewall of the dielectric and on the sidewall of the first conductor wherein the protective spacer is substantially perpendicular to the first surface.

7. The contact structure of claim 1 wherein the alignment spacer is between the first conductor and a third conductor.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038631/0345 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A. (ON ITS BEHALF AND ON BEHALF OF ITS PREDECESSOR IN INTEREST, CHASE MANHATTAN BANK)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038632/0074 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
SECURITY AGREEMENT Recorded Jan 19, 2010
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 023826/0725 →