IP Library Granted Patent US 7,570,035
Granted Patent B2
US 7,570,035 · App. 11/888,715 · Granted Aug 4, 2009

Voltage regulator with a hybrid control loop

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Quick Facts
Patent No.
US 7,570,035
App. No.
11/888,715
Granted
Aug 4, 2009
Kind
B2
Abstract

A voltage regulator circuit and method are provided for regulating a voltage accurately in response to rapid variations in the regulator's load. The voltage regulator utilizes a hybrid loop; an embodiment of such utilization is exemplified by circuit 300 . Amplifier 301 controls the current flowing through pass element 303 from an unregulated input voltage node V in to a regulated voltage output node V out . The regulated output voltage is provided to load 311 so that the voltage across the load stays constant regardless of variations in the current it pulls. The value of the regulated voltage is set by feedback network 302 and the input voltage at node V ref . The regulator feedback loop formed by amplifier 301 , pass element 303 , and feedback network 302 regulate the voltage at V out in response to low frequency perturbations in load 311 . In response to high frequency perturbations, a sensing network triggers control circuitry 310 . Such a sensing network is exemplified in this embodiment by comparators 308 and 309 . In response to a trigger signal, the control circuitry adjusts the drive capability of pass element 303 to rapidly return V out to its regulated value. When the voltage at V out returns to its regulated value the drive capability of pass element 303 is reset.

Claims (68)

1. A hybrid loop voltage regulator circuit for voltage regulation of a load, said hybrid loop voltage regulator comprising:

an amplifier having a first input terminal coupled to a reference voltage node, a second input terminal, and an output terminal;

a pass element having a first terminal coupled to said output terminal of said amplifier, a second terminal coupled to a regulated voltage node, a third terminal for controlling the drive capability of said pass element, and a fourth terminal coupled to an unregulated input voltage node;

a feedback network coupled to a regulated voltage node, a ground voltage node, and said second input terminal of said amplifier, said feedback network having nodes at various intermittent potentials from said regulated voltage node to said ground node; and

a compare and control circuit coupled to said feedback network and said third terminal of said pass element;

wherein said compare and control circuit augments the drive capability of said pass element in response to variations in the voltage of one of said nodes of said feedback network to improve the transient performance of the circuit.

2. The regulator of claim 1 , wherein said unregulated voltage has one of a higher potential and a lower potential than said regulated voltage.

3. The regulator of claim 1 , said feedback network further comprising:

a first resistor coupled from said regulated voltage node to an output proximate potential terminal of a second resistor; and

a third resistor coupled from a near center terminal of said second resistor to a ground proximate potential terminal of a fourth resistor that couples said ground proximate potential terminal to said ground voltage node;

wherein said output proximate potential terminal provides a first sensing point for said compare and control circuit, said near center terminal provides a feedback sensing point coupled to said second input terminal of said amplifier, and said near ground potential terminal provides a second sensing point for said compare and control circuit.

4. The regulator of claim 1 , said pass element further comprising:

a current path switch having a control terminal individually coupled to a third terminal of said pass element; and

an active current source having a current control terminal coupled to said first terminal of said pass element, and having a regulated current path terminal individually coupled to a particular said current path switch;

wherein said current path switch can be set into one of an activated state and a deactivated state by said compare and control circuitry; and

wherein said active current source is configured to provide a current path from said fourth terminal of said pass element to said second terminal of said pass element when said particular said individual current path switch is set in said activated state.

5. The regulator of claim 4 , said pass element further comprising:

a p-channel field effect transistor switch array including two individual p-channel transistor switches each having a p-channel transistor gate terminal that is individually coupled to said third terminal of said pass element, a p-channel transistor source terminal couple to said fourth terminal of said pass element, and a p-channel transistor drain terminal; and

an n-channel field effect transistor linear pass element array including two individual n-channel transistor transconductance amplifiers each having an n-channel transistor drain terminal that is individually coupled to a single said p-channel transistor drain terminal of said p-channel transistor switches, an n-channel transistor source terminal coupled to said second terminal of said pass element, and an n-channel transistor gate terminal that is coupled to said first terminal of said pass element;

wherein said coupling at said third terminal is by means of a control bus capable of sending control signals to each said p-channel transistor gate terminal individually to adjust said drive capability of said pass element.

6. The regulator of claim 4 , said pass element further comprising: an n-channel field effect transistor switch array including two individual n-channel transistor switches each having an n-channel transistor gate terminal that is individually coupled to said third terminal of said pass element, a n-channel transistor source terminal couple to said second terminal of said pass element, and an n-channel transistor drain terminal; and

an p-channel field effect transistor linear pass element array including two individual p-channel transistor transconductance amplifiers each having a p-channel transistor drain terminal that is individually coupled to a single said n-channel transistor drain terminal of said n-channel transistor switches, a p-channel transistor source terminal coupled to said fourth terminal of said pass element, and a p-channel transistor gate terminal that is coupled to said first terminal of said pass element;

wherein said coupling at said third terminal is by means of a control bus capable of sending control signals to each said n-channel transistor gate terminal individually to adjust said drive capability of said pass element.

7. The regulator of claim 4 , said pass element further comprising:

an n-channel field effect transistor switch array including two individual n-channel transistor switches each having an n-channel transistor gate terminal that is individually coupled to said third terminal of said pass element, a n-channel transistor source terminal couple to said second terminal of said pass element, and an n-channel transistor drain terminal; and

a p-n-p bipolar junction transistor linear pass element array including two individual p-n-p transistor current amplifiers each having a collector terminal that is individually coupled to a single said n-channel transistor drain terminal of said n-channel transistor switches, an emitter terminal coupled to said fourth terminal of said pass element, and a base terminal that is coupled to said first terminal of said pass element;

wherein said coupling at said third terminal is by means of a control bus capable of sending control signals to each said n-channel transistor gate terminal individually to adjust said drive capability of said pass element.

8. The regulator of claim 4 , said pass element further comprising:

an n-channel field effect transistor switch array including two individual n-channel transistor switches each having an n-channel transistor gate terminal that is individually coupled to said third terminal of said pass element, a n-channel transistor source terminal couple to said second terminal of said pass element, and an n-channel transistor drain terminal; and

a n-p-n bipolar junction transistor linear pass element array including two individual n-p-n transistor current amplifiers each having an emitter terminal that is individually coupled to a single said n-channel transistor drain terminal of said n-channel transistor switches, a collector terminal coupled to said fourth terminal of said pass element, and a base terminal that is coupled to said first terminal of said pass element;

wherein said coupling at said third terminal is by means of a control bus capable of sending control signals to each said n-channel transistor gate terminal individually to adjust said drive capability of said pass element.

9. The regulator of claim 1 , said compare and control circuitry comprising:

a comparator having a sensing input terminal coupled to one of said nodes of said feedback network, a voltage reference input terminal coupled to said reference voltage node, and a comparator output terminal coupled to control circuitry;

wherein said comparator is configured for sending a signal to said control circuitry from said comparator output terminal when a sensed voltage at said sensing input terminal crosses the voltage at said voltage reference input terminal.

10. The regulator of claim 1 , said compare and control circuitry comprising:

a comparator having a sensing input terminal coupled to one of said nodes of said feedback network, a voltage reference input terminal couple to a particular reference voltage node, and a comparator output terminal coupled to control circuitry;

wherein said comparator is configured for sending a signal to said control circuitry from said comparator output terminal when a sensed voltage at said sensing input terminal crosses the voltage at said voltage reference input terminal.

11. The regulator of claim 1 , said nodes comprising:

an over-voltage detection node set at a lower potential than a feedback node coupled to said amplifier; and

an under-voltage detection node set at a higher potential than said feedback node;

wherein said lower potential and said higher potential are set to provide improved transient performance while maintaining stability.

12. The regulator of claim 1 , said pass element further comprising:

an active current source formed by an array of multiple fingers of similar devices coupled between said regulated voltage node and said unregulated voltage node, and coupled to control circuitry;

wherein said control circuitry is capable of altering said multiple fingers between activated and deactivated states; and

wherein said multiple fingers are able to conduct current between said regulated voltage node and said unregulated voltage node when in said activated state.

13. A method for regulating an output voltage across a load at a regulated voltage with a hybrid voltage regulator, comprising the steps of:

regulating said output voltage across said load in response to low frequency perturbations utilizing a linear voltage regulator feedback system;

monitoring a voltage at sense voltage nodes in a feedback loop of said linear voltage regulator feedback system to detect high frequency perturbations;

generating a control signal in response to detection of said high frequency perturbations;

altering a drive capability of a pass element of said linear voltage regulator feedback system from an original dead zone value in response to said control signal to temporarily increase a speed of said linear voltage regulator feedback system;

measuring said sense voltage nodes in said feedback loop to detect when said voltage across said load is within a range of said regulated voltage; and

resetting the drive capability of said pass element to said original dead zone value.

14. The method of claim 13 , wherein said sense voltage nodes are comprised of an under-voltage node and an over-voltage node;

wherein said monitoring detects high frequency perturbations when said under-voltage node has a higher potential than a reference voltage or said over-voltage node has a lower potential than said reference voltage; and

wherein said measuring detects when said output voltage across said load is within said range of said regulated voltage when said under-voltage has a lower potential than said reference voltage and said over-voltage node has a higher potential than said reference voltage.

15. The method of claim 13 , wherein said sense voltage nodes comprise a single detection node;

wherein said monitoring detects high frequency perturbations when said single detection node is at least one of a higher potential than a reference voltage and a lower potential than said reference voltage;

wherein said measuring detects when said output voltage across said load is within a range of said regulated voltage when said single detection node has a potential closer to the potential said single detection node has when said output voltage has is at a potential substantially equivalent to said regulated voltage than to said reference voltage; and

wherein said altering the drive capability of said pass element is unidirectional from said original dead zone value.

16. The method of claim 13 , wherein said sense voltage nodes comprise a single detection node;

wherein said monitoring detects high frequency perturbations when at least one of said single detection node has a higher potential than a high reference voltage node, and said single detection node has a lower potential than a low reference voltage node;

wherein said measuring detects when said output voltage across said load is within a range of said regulated voltage when said single detection node has a lower potential than said high reference voltage node and said single detection node has a higher potential than said low reference voltage node; and

wherein said high reference voltage node has a higher potential than any of the said low reference voltage nodes.

17. The method of claim 13 , wherein said altering the drive capability of said pass element is accomplished by adjusting a geometry of an active device that comprises said pass element; and wherein said drive capability is increased by increasing a current limiting geometric factor and said drive capability is decreased by decreasing the current limiting geometric factor.

18. The method of claim 17 , wherein said adjusting the geometry of an active device is accomplished in a nonlinear fashion to provide improved transient response based on a particular common transient behavior of said load.

19. The method of claim 13 , wherein said original dead zone value induces a minimum drive capability of said pass element; and wherein said altering the drive capability of said pass element is unidirectional from said dead zone value.

20. The method of claim 13 , wherein said original dead zone value induces at least one of a mid point, close to minimum, and close to maximum drive capability of said pass element; and

wherein said original dead zone value is selected to more efficiently regulate said load in response to a particular type of said high frequency perturbation.

Assignments (19)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2025
From: MICROCHIP TECHNOLOGY INC.; MICROCHIP TECHNOLOGY IRELAND LIMITED; MICROSEMI CORPORATION; ATMEL CORPORATION; SILICON STORAGE TECHNOLOGY, INC.; MICROSEMI FREQUENCY AND TIME CORP.; MICROSEMI SEMICONDUCTOR ULC; MICROCHIP TECHNOLOGY GERMANY GMBH
To: CRESTONE IP MANAGEMENT, LLC
Reel/Frame 071991/0419 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
CORRECTIVE ASSIGNMENT TO CORRECT THE SERIAL NUMBER: 11538833 TO 11494874 PATENT NUMBER: 7548080 TO 7548040 PREVIOUSLY RECORDED ON REEL 024563 FRAME 0861. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF LETTERS PATENT EXHIBIT A MERGER AGREEMENT SCHEDULE 2.17.5. Recorded Jun 29, 2010
From: ZEROG WIRELESS, INC.; AZ1 ACQUISITION CORPORATION
To: MICROCHIP TECHNOLOGY INC.
Reel/Frame 024599/0933 →
MERGER Recorded Jun 22, 2010
From: ZEROG WIRELESS, INC.; AZ1 ACQUISITION CORPORATION
To: MICROCHIP TECHNOLOGY INC.
Reel/Frame 024563/0861 →
SECURITY AGREEMENT Recorded Mar 14, 2008
From: ZEROG WIRELESS, INC.
To: SILICON VALLEY BANK
Reel/Frame 020656/0238 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2007
From: KLEVELAND, BENDIK
To: ZEROG WIRELESS, INC.
Reel/Frame 019700/0277 →