Method for fabricating a metal-insulator-metal (MIM) capacitor having capacitor dielectric layer formed by atomic layer deposition (ALD)
In a thin film transistor, each of an upper electrode and a lower electrode is formed of at least one material selected from the group consisting of a metal and a metal nitride, represented by TiN, Ti, W, WN, Pt, Ir, Ru. A capacitor dielectric film is formed of at least one material selected from the group consisting of ZrO 2 , HfO 2 , (Zr x , Hf 1-x )O 2 (0<x<1), (Zr y , Ti 1-y )O 2 (0<y<1), (Hf z , Ti 1-z )O 2 (0<z<1), (Zr k , Ti l , Hf m )O 2 (0<k, l, m<1, k+l+m=1), by an atomic layer deposition process. The thin film transistor thus formed has a minimized leakage current and an increased capacitance.
1. A method of fabricating a semiconductor device comprising:
forming source and drain regions and a gate electrode of a transistor,
forming a metal silicide layer over said source and drain regions, wherein said metal silicide undergoes aggregation at temperatures of 600° C. and above,
forming a metal plug in contact with one of the source and drain regions of said transistor,
forming a lower metal electrode of a capacitor in contact with said metal plug and in contact with an interlayer insulating film,
forming a capacitor dielectric film on said lower metal electrode by atomic layer deposition (ALD),
forming an upper metal electrode on said capacitor dielectric film, and
after formation of said dielectric film, carrying out a heat treatment at a temperature not lower than a film deposition temperature in the ALD,
wherein said capacitor dielectric film is selected from the group consisting of ZrO 2 , HfO 2 , (Zr x , Hf 1-x )O 2 (0<x<1), (Zr y , Ti 1-y )O 2 (0<y<1), (Hf z , Ti 1-z )O 2 (0<z<1), (Zr k , Ti l , Hf m )O 2 (0<k, l, m<1, k+l+m=1), and
wherein said method is conducted at temperatures less than 600° C. after formation of said metal silicide layer.
2. The method as claimed in claim 1 , wherein said dielectric film thickness is 5 to 15 nm.
3. The method as claimed in claim 1 , wherein said heat treatment is carried out under non-oxidation atmosphere.
4. The method as claimed in claim 3 , wherein said non-oxidation atmosphere consists of at least one gas selected from the group N2, Ar, He, H2+N2.
5. The method as claimed in claim 3 , wherein said non-oxidation atmosphere consists of at least one gas selected from the group N2, H2+N2.
6. The method as claimed in claim 1 , wherein said dielectric film is ZrO2.
7. The method as claimed in claim 1 , wherein said upper and lower electrodes are TiN.
8. The method as claimed in claim 3 , wherein said upper and lower electrodes are formed by ALD.
9. A method of fabricating a semiconductor device having a logic section and a memory section that are formed on the same semiconductor chip comprising,
forming source and drain regions and a gate electrode of a first transistor in said logic section,
forming source and drain regions and a gate electrode of a second transistor in said memory section,
forming a metal silicide layer over said source and drain regions of said first and second transistors, wherein said metal silicide undergoes aggregation at temperatures of 600° C. and above,
forming a metal plug in contact with one of the source and drain regions of said second transistor,
forming a lower metal electrode of a capacitor in contact with said metal plug and in contact with an interlayer insulating film,
forming a capacitor dielectric film on said lower metal electrode by atomic layer deposition (ALD), and
forming an upper metal electrode on said capacitor dielectric film,
wherein said capacitor dielectric film is selected from the group consisting of ZrO2, HfO2, (Zrx, Hf1−x)O2 (0<x<1), (Zry, Ti1−y)O2 (0<y<1), (Hfz, Ti1−z)O2 (0<z<1) and (Zrk, Til, Hfm)O2 (0<k, l, m<1, k+l+m=1), and
wherein said method is conducted at temperatures less than 600° C. after formation of said metal silicide layer.
10. The method as claimed in claim 9 , wherein said dielectric film is substantially crystallized.
11. The method as claimed in claim 9 , wherein said dielectric film thickness is 5 to 15 nm.
12. The method as claimed in claim 10 , wherein after formation of said dielectric film, a heat treatment is carried out at a temperature not lower than a film deposition temperature in the atomic layer deposition.
13. The method as claimed in claim 12 , wherein said heat treatment is carried out under non-oxidation atmosphere.
14. The method as claimed in claim 9 , wherein said dielectric film is ZrO2.
15. The method as claimed in claim 9 , wherein said upper and lower electrodes are TiN.
16. The method as claimed in claim 9 , wherein said capacitor dielectric film is selected from the group consisting of ZrO 2 , HfO 2 and (Zr x , Hf 1-x )O 2 (0<x<1).
17. A method of fabricating a semiconductor device comprising:
forming source and drain regions and a gate electrode of a transistor,
forming a metal silicide layer over said source and drain regions, wherein said metal silicide undergoes aggregation at temperatures of 600° C. and above,
forming a metal plug in contact with one of the source and drain regions of said transistor,
forming a lower metal electrode of a capacitor in contact with said metal plug and in contact with an interlayer insulating film,
forming a capacitor dielectric film on said lower metal electrode by atomic layer deposition (ALD),
forming an upper metal electrode on said capacitor dielectric film, and
after formation of said dielectric film, carrying out a heat treatment at a temperature not lower than a film deposition temperature in the ALD and not higher than a temperature where aggregation of said metal silicide layer occurs in a non-oxidizing atmosphere,
wherein said capacitor dielectric film is selected from the group consisting of ZrO 2 , HfO 2 , (Zr x , Hf 1-x )O 2 (0<x<1), (Zr y , Ti 1-y )O 2 (0<y<1), (Hf z , Ti 1-z )O 2 (0<z<1) and (Zr k , Ti l , Hf m )O 2 (0<k, l, m<1, k+l+m=1), and
wherein said method is conducted at temperatures less than 600° C. after formation of said metal silicide layer.
18. The method as claimed in claim 17 , wherein said heat treatment temperature is between 300° C. and 600° C.