IP Library Granted Patent US 8,067,275
Granted Patent B2
US 8,067,275 · App. 11/957,845 · Granted Nov 29, 2011

Integrated circuit package system with package integration

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Quick Facts
Patent No.
US 8,067,275
App. No.
11/957,845
Granted
Nov 29, 2011
Kind
B2
Abstract

An integrated circuit package system comprising: providing a base substrate; attaching a base integrated circuit die over the base substrate; forming a support over the base substrate near only one edge of the base substrate; and attaching a stack substrate over the support and the base integrated circuit die.

Claims (45)

1. A method for manufacturing an integrated circuit package system comprising:

providing a base substrate;

attaching a base integrated circuit die over the base substrate;

attaching a stack integrated circuit die over the base integrated circuit die;

attaching a spacer layer over the stack integrated circuit die with a portion of the spacer layer overhanging over a periphery of the stack integrated circuit die;

forming a support having a shape of an ovoid over the base substrate and adjacent only one edge of the base substrate; and

attaching a stack substrate over the support and the spacer layer.

2. The method as claimed in claim 1 further comprising attaching an electrical connector between the base substrate and the stack integrated circuit die with the electrical connector partially encased within the spacer layer.

3. The method as claimed in claim 1 wherein attaching the stack substrate includes attaching the stack substrate over the spacer layer formed over a portion of the base integrated circuit die.

4. The method as claimed in claim 1 wherein forming the support includes dotting a sole row of the support over the base substrate.

5. The method as claimed in claim 1 wherein forming the support includes forming a sole elongated shape over the base substrate.

6. A method for manufacturing an integrated circuit package system comprising:

providing a base substrate having a base internal surface;

attaching a base integrated circuit die over the base internal surface;

attaching a stack integrated circuit die over the base integrated circuit die;

attaching a spacer layer over the stack integrated circuit die with a portion of the spacer layer overhanging over a periphery of the stack integrated circuit die;

forming a support having a shape of an ovoid over the base substrate and adjacent only one edge of the base substrate;

attaching a stack substrate having a stack external surface and a stack internal surface over the support and the spacer layer; and

applying an encapsulant having an opening over the stack external surface.

7. The method as claimed in claim 6 further comprising attaching a device over the stack external surface and partially within the opening.

8. The method as claimed in claim 6 wherein forming the support includes forming the support on the base integrated circuit die.

9. The method as claimed in claim 6 wherein forming the support includes forming the support on the base substrate.

10. The method as claimed in claim 6 further comprising attaching a device over the base substrate adjacent the support or the base integrated circuit die.

11. An integrated circuit package system comprising:

a base substrate;

a base integrated circuit die over the base substrate;

a stacked integrated circuit die over the base integrated circuit die;

a spacer layer over the stack integrated circuit die with a portion of the spacer layer overhanging a periphery of the stack integrated circuit die;

a support having a shape of an ovoid over the base substrate and adjacent only one edge of the base substrate; and

a stack substrate over the support and the spacer layer.

12. The system as claimed in claim 11 further comprising an electrical connector attached between the base substrate and the stack integrated circuit die with the electrical connector partially encased within the spacer layer.

13. The system as claimed in claim 11 wherein the stack substrate is over the spacer layer formed over a portion of the base integrated circuit die.

14. The system as claimed in claim 11 wherein the support is a sole row dotted over the base substrate.

15. The system as claimed in claim 11 wherein the support is a sole elongated shape over the base substrate.

16. The system as claimed in claim 11 wherein:

the base substrate has a base internal surface;

the base integrated circuit die is over the base internal surface;

the support is over the base internal surface near only one edge of the base substrate;

the stack substrate has a stack external surface and a stack internal surface over the support and the base integrated circuit die; and

further comprising:

an encapsulant having an opening over the stack external surface.

17. The system as claimed in claim 16 further comprising a device over the stack external surface and partially within the opening.

18. The system as claimed in claim 16 wherein the support is on the base integrated circuit die.

19. The system as claimed in claim 16 wherein the support is on the base substrate.

20. The system as claimed in claim 16 further comprising a device over the base substrate adjacent the support or the base integrated circuit die.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0272. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0730 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0272 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2007
From: KO, WONJUN; JU, JONG WOOK; CHAI, SEUNGYONG; LIM, TAEG KI; YUN, JA EUN
To: STATS CHIPPAC LTD.
Reel/Frame 020257/0246 →