IP Library Granted Patent US 7,583,211
Granted Patent B1
US 7,583,211 · App. 12/028,104 · Granted Sep 1, 2009

Analog-to-digital conversion circuit

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Quick Facts
Patent No.
US 7,583,211
App. No.
12/028,104
Granted
Sep 1, 2009
Kind
B1
Abstract

An analog-to-digital conversion circuit and a method for calibrating an analog-to-digital conversion circuit are provided. A digital translation of an analog voltage is analyzed to determine a characteristic value of the analog voltage. A reference voltage, with which the digital translation is generated, is set to a value that is a minimum amount greater than the characteristic value. Additional embodiments include setting an offset voltage, with which the digital translation is also generated.

Claims (47)

1. A method for calibrating an analog-to-digital conversion circuit, comprising:

analyzing a digital translation of an analog voltage to determine a swing value of the analog voltage and a minimum magnitude of the analog voltage;

setting a reference voltage, with which the digital translation is generated, to a value that is a minimum amount greater than the characteristic value; and

setting an offset voltage, with which the digital translation is also generated, to a value that is a minimum amount below the minimum magnitude of the analog voltage.

2. The method of claim 1 , further comprising:

analyzing the digital translation of the analog voltage for a period of time to determine the minimum magnitude and the swing value of the analog voltage.

3. The method of claim 2 , further comprising:

analyzing the digital translation of the analog voltage for the period of time to determine whether the analog voltage during the period of time is ever greater than the reference voltage; and

if so, increasing the reference voltage and repeating the method before setting the reference voltage to the value that is the minimum amount greater than the swing value and before setting the offset voltage to the value that is the minimum amount below the minimum magnitude.

4. The method of claim 2 , further comprising:

analyzing the digital translation of the analog voltage for the period of time to determine whether the analog voltage during the period of time is always less than a threshold voltage; and

if so, decreasing the reference voltage and repeating the method before setting the reference voltage to the value that is the minimum amount greater than the swing value and before setting the offset voltage to the value that is the minimum amount below the minimum magnitude.

5. A method for calibrating an analog-to-digital conversion circuit, comprising:

analyzing a digital translation of an analog voltage to determine is a maximum magnitude of the analog voltage; and

setting a reference voltage, with which the digital translation is generated, to a value that is a minimum amount above the maximum magnitude.

6. The method of claim 5 , wherein:

the analyzing further comprises analyzing the digital translation of the analog voltage for a period of time to determine the maximum magnitude of the analog voltage during the period of time.

7. The method of claim 6 , further comprising:

analyzing the digital translation of the analog voltage for the period of time to determine whether the analog voltage during the period of time is ever greater than the reference voltage; and

if so, increasing the reference voltage and repeating the method before setting the reference voltage to the value that is the minimum amount above the maximum magnitude.

8. The method of claim 6 , further comprising:

analyzing the digital translation of the analog voltage for the period of time to determine whether the analog voltage during the period of time is always less than a threshold voltage; and

if so, decreasing the reference voltage and repeating the method before setting the reference voltage to the value that is the minimum amount above the maximum magnitude.

9. An analog-to-digital conversion circuit for converting an input voltage to a digital translation thereof, comprising:

an ADC that receives the input voltage, a reference voltage and an offset voltage and that outputs a

digital representation of the input voltage based on the reference voltage and the offset voltage, the input voltage being characterized by a swing value and a minimum value; and

a controller that receives and analyzes the digital representation of the input voltage to determine the swing value and the minimum value thereof and that

sets the offset voltage to be a minimum amount below the minimum value of the input voltage and sets the reference voltage to be the minimum amount greater than the swing value of the input voltage.

10. The analog-to-digital conversion circuit of claim 9 , wherein:

the controller analyzes the digital representation of the input voltage for a period of time to determine the minimum and swing values of the input voltage before setting the offset voltage to be the minimum amount below the minimum value of the input voltage and before setting the reference voltage to be the minimum amount greater than the swing value of the input voltage.

11. The analog-to-digital conversion circuit of claim 10 , wherein:

the controller analyzes the digital representation of the input voltage for the period of time to determine whether the input voltage during the period of time is ever greater than the reference voltage and, if so, increases the reference voltage and repeats the analysis before setting the offset voltage to be the minimum amount below the minimum value of the input voltage and before setting the reference voltage to be the minimum amount greater than the swing value of the input voltage.

12. The analog-to-digital conversion circuit of claim 10 , wherein:

the controller analyzes the digital representation of the input voltage for the period of time to determine whether the input voltage during the period of time is always less than a threshold voltage and, if so, decreases the reference voltage and repeats the analysis before setting the offset voltage to be the minimum amount below the minimum value of the input voltage and before setting the reference voltage to be the minimum amount greater than the swing value of the input voltage.

13. An analog-to-digital conversion circuit for converting an input voltage to a digital translation thereof, comprising:

an ADC that receives the input voltage and a reference voltage and that outputs a digital representation of the input voltage based on the reference voltage, the input voltage being characterized by a maximum value thereof; and

a controller that receives and analyzes the digital representation of the input voltage to determine the maximum value thereof and that sets the reference voltage to be a minimum amount greater than the maximum value of the input voltage.

14. The analog-to-digital conversion circuit of claim 13 , wherein:

the controller analyzes the digital representation of the input voltage for a period of time to determine the maximum value of the input voltage before setting the reference voltage.

15. The analog-to-digital conversion circuit of claim 14 , wherein:

the controller analyzes the digital representation of the input voltage for the period of time to determine whether the input voltage during the period of time is ever greater than the reference voltage and, if so, increases the reference voltage and repeats the analysis before setting the reference voltage to be the minimum amount greater than the maximum value of the input voltage.

16. The analog-to-digital conversion circuit of claim 14 , wherein:

the controller analyzes the digital representation of the input voltage for the period of time to determine whether the input voltage during the period of time is always less than a threshold voltage and, if so, decreases the reference voltage and repeats the analysis before setting the reference voltage to be the minimum amount greater than the maximum value of the input voltage.

17. An analog-to-digital conversion circuit for converting an input voltage to a digital translation thereof, comprising:

a means for generating a digital representation of the input voltage based on a reference voltage and an offset voltage, the input voltage being characterized by a swing value and a minimum value;

a means for analyzing the digital representation of the input voltage to determine the swing value and the minimum value thereof; and

a means for setting the offset voltage to be a minimum amount below the minimum value of the input voltage and setting the reference voltage to be a minimum amount greater than the swing value of the input voltage.

Assignments (18)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
CORRECTIVE ASSIGNMENT TO CORRECT THE SERIAL NUMBER: 11538833 TO 11494874 PATENT NUMBER: 7548080 TO 7548040 PREVIOUSLY RECORDED ON REEL 024563 FRAME 0861. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF LETTERS PATENT EXHIBIT A MERGER AGREEMENT SCHEDULE 2.17.5. Recorded Jun 29, 2010
From: ZEROG WIRELESS, INC.; AZ1 ACQUISITION CORPORATION
To: MICROCHIP TECHNOLOGY INC.
Reel/Frame 024599/0933 →
MERGER Recorded Jun 22, 2010
From: ZEROG WIRELESS, INC.; AZ1 ACQUISITION CORPORATION
To: MICROCHIP TECHNOLOGY INC.
Reel/Frame 024563/0861 →
SECURITY AGREEMENT Recorded Mar 14, 2008
From: ZEROG WIRELESS, INC.
To: SILICON VALLEY BANK
Reel/Frame 020656/0170 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2008
From: WU, HONGLEI
To: ZEROG WIRELESS, INC.
Reel/Frame 020486/0243 →