IP Library Granted Patent US 8,106,485
Granted Patent B2
US 8,106,485 · App. 12/044,245 · Granted Jan 31, 2012

Chemical oxide removal of plasma damaged SiCOH low k dielectrics

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Quick Facts
Patent No.
US 8,106,485
App. No.
12/044,245
Granted
Jan 31, 2012
Kind
B2
Abstract

A structure and method for removing damages of a dual damascene structure after plasma etching. The method includes the use of sublimation processes to deposit reactive material onto the damaged regions and conditions to achieve a controlled removal of the damaged region. Furthermore a semiconductor structure includes a dual damascene structure that has been treated by the method.

Claims (60)

1. A semiconductor device comprising:

a plasma etched damascene structure comprising a trench having sidewalls formed in an interlevel dielectric film;

a barrier layer comprising Si 3 N 4 formed on a silicon wafer; and

a photoresist layer formed on the interlevel dielectric film;

wherein the sidewalls are devoid of plasma-induced damage,

the interlevel dielectric film is formed on the barrier layer, and

the sidewalls are recessed from the photoresist by an amount equal to a trimming dimension associated with a removed damaged portion, whereby damage to the sidewalls of the plasma etched damascene structure is removed by:

depositing a controlled amount of gaseous hydrofluoric acid and ammonia gas onto the sidewalls of the dual damascene structure;

forming volatile reaction products from a chemical reaction between the plasma induced damages and the deposited mixture of ammonia gas and gaseous hydrofluoric acid; and

removing the volatile reaction products.

2. The semiconductor device according to claim 1 , wherein the interlevel dielectric film comprises low k material having a dielectric constant of 3.9 or less.

3. The semiconductor device according to claim 1 , wherein the damage is removed by trimming the sidewalls between 1 and 25 nm.

4. The semiconductor device of claim 1 , wherein the interlevel dielectric film comprises organic siloxanes.

5. The semiconductor device of claim 1 , wherein the volatile reaction products are removed with a vacuum.

6. The semiconductor device of claim 1 , wherein the volatile reaction products are removed with a non-reactive flushing gas.

7. The semiconductor device of claim 1 , wherein the volatile reaction products are removed with a vacuum or a non-reactive flushing gas.

8. The semiconductor device of claim 1 , wherein the trench extends through the barrier layer to the silicon wafer.

9. The semiconductor device according to claim 1 , wherein the sidewalls are recessed from the photoresist by approximately 1 to 25 nm.

10. A semiconductor device comprising:

a plasma etched dual damascene structure comprising a trench having sidewalls formed in an interlevel dielectric film; and

a photoresist layer formed on the interlevel dielectric film;

wherein the sidewalls are devoid of plasma-induced damage, and

the sidewalls are recessed from the photoresist, whereby damage to the sidewalls of the plasma etched dual damascene structure is removed by:

depositing a controlled amount of gaseous hydrofluoric acid and ammonia gas onto the sidewalls of the dual damascene structure;

forming volatile reaction products from a chemical reaction between the plasma induced damages and the deposited mixture of ammonia gas and gaseous hydrofluoric acid; and

removing the volatile reaction products,

wherein the recessed sidewalls result in a portion of the photoresist forming an overhang; and

the recessed sidewalls are recessed from the photoresist by an amount equal to a trimming dimension associated with a removed damaged portion.

11. The semiconductor device according to claim 1 , wherein sidewalls of the barrier layer are recessed from the photoresist.

12. The semiconductor device according to claim 11 , wherein both the sidewalls formed in the interlevel dielectric film and the sidewalls of the barrier layer are recessed from the photoresist by approximately 1 to 25 nm.

13. The semiconductor device according to claim 11 , wherein a portion of the photoresist overhangs both the sidewalls formed in the interlevel dielectric film and the sidewalls of the barrier layer.

14. The semiconductor device according to claim 1 , wherein:

the interlevel dielectric film is directly on the barrier layer;

the trench extends through the barrier layer to the silicon wafer;

the sidewalls of the barrier layer are recessed from the photoresist by an amount equal to the trimming dimension associated with the removed damaged portion;

the sidewalls formed in the interlevel dielectric film and the sidewalls of the barrier layer are aligned; and

the interlevel dielectric film comprises organic siloxanes.

15. A semiconductor device comprising:

a plasma etched damascene structure comprising a trench having sidewalls formed in an interlevel dielectric film;

a photoresist layer formed on the interlevel dielectric film; and

a barrier layer on a silicon wafer,

wherein the sidewalls are devoid of plasma-induced damage,

the sidewalls are recessed from the photoresist,

the interlevel dielectric film is on and contacting the barrier layer;

the trench extends through the barrier layer to the silicon wafer;

both the sidewalls formed in the interlevel dielectric film and sidewalls of the barrier layer are recessed from the photoresist by an amount equal to a trimming dimension associated with a removed damaged portion;

the sidewalls formed in the interlevel dielectric film and the sidewalls of the barrier layer are aligned;

the interlevel dielectric film comprises organic siloxanes;

the barrier layer comprises nitride; and

damage to the sidewalls of the plasma etched damascene structure is removed by:

depositing a controlled amount of gaseous hydrofluoric acid and ammonia gas onto the sidewalls of the dual damascene structure;

forming volatile reaction products from a chemical reaction between the plasma induced damages and the deposited mixture of ammonia gas and gaseous hydrofluoric acid; and

removing the volatile reaction products.

16. A semiconductor device comprising:

a damascene structure comprising a trench having sidewalls formed in an interlevel dielectric film;

a barrier layer comprising nitride on a silicon wafer; and

a photoresist layer on the interlevel dielectric film;

wherein the sidewalls are devoid of plasma-induced damage,

the interlevel dielectric film is on the barrier layer, and

the sidewalls are recessed from the photoresist by an amount equal to a trimming dimension associated with a removed damaged portion.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2020
From: ALSEPHINA INNOVATIONS, INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 053351/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2019
From: GLOBALFOUNDRIES INC.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049612/0211 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →