IP Library Granted Patent US 7,969,134
Granted Patent B2
US 7,969,134 · App. 12/056,531 · Granted Jun 28, 2011

Method of forming a power supply controller and structure therefor

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Quick Facts
Patent No.
US 7,969,134
App. No.
12/056,531
Granted
Jun 28, 2011
Kind
B2
Abstract

In one embodiment, a power supply controller is configured to select either an error signal or a variable reference signal to control an on-time of the switching output signal of the power supply controller.

Claims (42)

1. A power supply controller comprising:

a clock circuit configured to form a clock signal having a first period;

a PWM block configured to receive the clock signal and form a PWM drive signal to control a current through an inductor in order to regulate an output voltage to a desired value, the PWM drive signal having the first period;

a first input configured to receive a feedback signal that is representative of the output voltage;

an error circuit configured to receive the feedback signal and form an error signal that is representative of a deviation of the output voltage from the desired value;

a ramp generator configured to form a ramp signal wherein the ramp signal has the first period;

a sense circuit configured to form a sense signal that is representative of an instantaneous value of the current through the inductor;

a reference circuit configured to form a reference signal wherein the reference circuit is configured to vary a value of the reference signal responsively to the sense signal;

a control circuit configured to selectively form a threshold signal substantially equal to one of the error signal or the reference signal responsively to a difference between the error signal and the reference signal; and

a PWM comparator actively coupled to compare the ramp signal to the threshold signal to control an on-time of the PWM drive signal.

2. The power supply controller of claim 1 wherein the control circuit includes a comparator coupled to compare the error signal and responsively select either the error signal or the reference signal to the threshold signal.

3. The power supply controller of claim 1 wherein the sense circuit is operably coupled to use the sense signal to form a power signal that representative of an instantaneous value of power supplied by the power supply controller.

4. The power supply controller of claim 3 wherein the sense circuit includes an amplifier coupled to form the sense signal and a multiplier coupled to multiply the sense signal by a signal that is representative of an instantaneous value of the output voltage.

5. The power supply controller of claim 4 wherein the reference circuit is configured to vary the value of the reference signal responsively to the power signal.

6. The power supply controller of claim 1 wherein the clock circuit is configured to selectively vary a frequency of the clock signal responsively to a difference between the error signal and the reference signal.

7. The power supply controller of claim 6 wherein the clock circuit includes an oscillator having a second period that is less than the first period and wherein the clock circuit is configured to vary the frequency of the clock signal in increments of the second period.

8. A power supply controller comprising:

a clock circuit configured to form a clock signal having a first period;

a switching control block configured to receive the clock signal and form a switching drive signal to control a current through an inductor in order to regulate an output voltage to a desired value, the switching drive signal having the first period;

a feedback input configured to receive a feedback signal that is representative of the output voltage;

an error circuit configured to receive the feedback signal and form an error signal that is representative of a deviation of the output voltage from the desired value;

a ramp generator configured to form a ramp signal wherein the ramp signal has the first period;

a reference circuit configured to form a reference signal;

a sense circuit configured to form a sense signal comprising an instantaneous value of the current through the inductor wherein the power supply controller is operably coupled to vary one of the reference signal or the ramp signal responsively to the sense signal; and

a control circuit configured to compare the ramp signal to either the reference signal responsively to a first difference in value between a value of the error signal and a value of the reference signal or to the error signal responsively to a second difference in value between the value of the error signal and the value of the reference signal.

9. The power supply controller of claim 8 wherein the control circuit is configured to selectively form a threshold signal that is substantially equal to the error signal or substantially equal to the reference signal responsively to a difference between the error signal and the reference signal.

10. The power supply controller of claim 9 wherein the control circuit includes a comparator coupled to compare the error signal to the reference signal and responsively select either the error signal or the reference signal to the threshold signal.

11. The power supply controller of claim 9 further including a switching control comparator actively coupled to compare the ramp signal to the threshold signal to control an on-time of the switching drive signal.

12. The power supply controller of claim 8 wherein the sense circuit is operably coupled to form the sense signal to be representative of an instantaneous value of power supplied by the power supply controller.

13. The power supply controller of claim 12 wherein the sense circuit includes an amplifier coupled to form a current sense signal that is representative of the current through the inductor and a multiplier coupled to multiply the current sense signal by a signal that is representative of an instantaneous value of the output voltage.

14. The power supply controller of claim 13 wherein the sense circuit is configured to vary one of a slew rate of the ramp signal, an offset voltage of the ramp signal, or a value of the reference signal responsively to the sense signal.

15. The power supply controller of claim 8 wherein the clock circuit is configured to selectively vary a frequency of the clock signal responsively to a difference between the error signal and the reference signal.

16. A method of forming a power supply controller comprising:

configuring the power supply controller to form a ramp signal and to use the ramp signal to form a switching signal that is used to regulate an output voltage to a desired value;

configuring the power supply controller to receive a feedback signal that is representative of a value of an output of a power supply system;

configuring the power supply controller to form an error signal that is representative of a deviation of the output voltage from a desired value;

configuring a clock circuit to form a first clock signal having a first period of a substantially fixed duration, to count occurrences of the first clock to form a second clock signal having a second period that is a multiple of the first period including resetting the count responsively to a state of the switching signal, and to vary the multiple responsively to a difference between the error signal and a reference signal; and

configuring the power supply controller to compare the ramp signal to a threshold signal and to form the threshold signal substantially equal to either the error signal responsively to a first difference in value between a value of the error signal and a value of the reference signal or substantially equal to the error signal responsively to a second difference in value between the value of the error signal and the value of the reference signal.

17. The method of claim 16 further including configuring the power supply controller to form a sense signal that is representative of the feedback signal and to vary one of the reference signal or the ramp signal responsively to the sense signal.

18. The method of claim 16 further including configuring the power supply controller to compare the ramp signal to a threshold signal to adjust a duty cycle of the switching signal and to selectively couple either the reference signal or the error signal to be the threshold signal responsively to the difference between the error signal and the reference signal.

19. The power supply controller of claim 1 wherein the control circuit includes the control circuit configured to form the threshold signal substantially equal to error signal responsively to a first value of the difference between the error signal and the reference signal and to form the threshold signal substantially equal to the reference signal responsively to a second value of the difference between the error signal and the reference signal.

20. The method of claim 18 wherein configuring the power supply controller to compare the ramp signal to a threshold signal includes configuring the power supply controller to form the threshold signal as substantially the error signal responsively to a first value of the difference between the error signal and the reference signal so that the ramp signal is compared to substantially the error signal and to form the threshold signal as substantially the reference signal responsively to a second value of the difference between the error signal and the reference signal so that the ramp signal is compared to substantially the reference signal.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038631/0345 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A. (ON ITS BEHALF AND ON BEHALF OF ITS PREDECESSOR IN INTEREST, CHASE MANHATTAN BANK)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038632/0074 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
SECURITY AGREEMENT Recorded Jan 19, 2010
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 023826/0725 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2008
From: CHEN, GANG
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 020711/0945 →