IP Library Granted Patent US 7,560,325
Granted Patent B1
US 7,560,325 · App. 12/102,382 · Granted Jul 14, 2009

Methods of making lateral junction field effect transistors using selective epitaxial growth

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Quick Facts
Patent No.
US 7,560,325
App. No.
12/102,382
Granted
Jul 14, 2009
Kind
B1
Abstract

Methods of making a semiconductor device such as a lateral junction field effect transistor (JFET) are described. The methods are self-aligned and involve selective epitaxial growth using a regrowth mask material to form the gate or the source/drain regions of the device. The methods can eliminate the need for ion implantation. The device can be made from a wide band-gap semiconductor material such as SiC. The regrowth mask material can be TaC. The devices can be used in harsh environments including applications involving exposure to radiation and/or high temperatures.

Claims (53)

1. A method comprising:

selectively etching a layer of regrowth mask material through one or more openings in a first mask to form a discrete raised region of semiconductor material having an upper surface and sidewalls, wherein the layer of regrowth mask material is on a first layer of semiconductor material which is on a second layer of semiconductor material which is on a third layer of semiconductor material which is on a substrate, wherein the second layer of semiconductor material is of a first conductivity type and wherein the first and third layers of semiconductor material are of a second conductivity type different than the first conductivity type, and wherein etching comprises etching through the layer of regrowth mask material and the first layer of semiconductor material to expose underlying second layer of semiconductor material in regions adjacent the first mask;

removing the first mask such that the upper surface of the discrete raised region is covered by the regrowth mask material;

epitaxially growing one or more layers of semiconductor material of the first conductivity type on sidewalls of the discrete raised region and on the second layer of semiconductor material adjacent the discrete raised region; and

removing the regrowth mask material from the upper surface of the discrete raised region.

2. The method of claim 1 , wherein the semiconductor material of the first conductivity type is an n-type semiconductor material and wherein the semiconductor material of the second conductivity type is a p-type semiconductor material.

3. The method of claim 2 , wherein the semiconductor material is a wide bandgap semiconductor material.

4. The method of claim 1 , wherein the semiconductor material is SiC.

5. The method of claim 1 , wherein epitaxially growing one or more layers of semiconductor material of the first conductivity type comprises epitaxially growing two layers of semiconductor material of the first conductivity type, wherein the first layer has a lower doping concentration than the second layer.

6. The method of claim 1 , wherein the regrowth mask material comprises TaC or C.

7. The method of claim 6 wherein the regrowth mask material comprises TaC, the method further comprising:

depositing a layer comprising carbon on the first layer of semiconductor material;

depositing a layer comprising tantalum on the layer comprising carbon; and

annealing to form the layer of regrowth mask material.

8. The method of claim 1 , wherein the first mask comprises Ti or Ni.

9. The method of claim 1 , further comprising:

depositing ohmic metal on the upper surface of the dicrete raised region to form a gate ohmic contact and depositing ohmic metal on the one or more layers of semiconductor material adjacent the discrete raised region to form source and drain ohmic contacts; and

annealing the source, drain and gate ohmic contacts.

10. The method of claim 9 , wherein the ohmic metal is Ni.

11. The method of claim 9 , further comprising depositing an electrically conductive metal layer in contact with the source, gate and drain ohmic contacts.

12. A semiconductor device made by the method of claim 1 .

13. A method comprising:

selectively etching a first layer of semiconductor material through one or more openings in a first mask to form first and second discrete raised regions of semiconductor material having upper surfaces covered by the first mask, wherein the first layer of semiconductor material is on a second layer of semiconductor material which is on a third layer of semiconductor material which is on a semiconductor substrate, wherein the first and second layers of semiconductor material are of a first conductivity type, wherein the third layer of semiconductor material is of a second conductivity type different than the first conductivity type, wherein etching exposes the second layer of semiconductor material in regions adjacent and between the first and second discrete raised regions, and wherein the first mask comprises a layer of regrowth mask material on the first semiconductor layer and a layer of etch mask material on the layer of regrowth mask material,

depositing a second mask over the second layer of semiconductor material in an area between the first and second discrete raised regions;

etching through the second layer of semiconductor material and the third layer of semiconductor material to expose the substrate in areas adjacent the first and second masks;

removing the second mask such that the area between the discrete raised regions is exposed;

removing the layer of etch mask material such that the upper surfaces of the discrete raised regions are covered by the regrowth mask material;

epitaxially growing one or more layers of semiconductor material of the second conductivity type on the area between the first and second discrete raised regions and on the substrate adjacent the first and second discrete raised regions;

removing the regrowth mask material;

depositing a third mask over the first and second discrete raised regions, over the area between the first and second discrete raised regions and on a gate region of the one or more layers of semiconductor material of the second conductivity type adjacent the first and second discrete raised regions;

etching through the one or more layers of semiconductor material of the second conductivity type in areas adjacent the third mask; and

removing the third mask.

14. The method of claim 13 , wherein the first layer of semiconductor material has a higher doping concentration than the second layer of semiconductor material.

15. The method of claim 13 , wherein the semiconductor material of the first conductivity type is an n-type semiconductor material and wherein the semiconductor material of the second conductivity type is a p-type semiconductor material.

16. The method of claim 13 , wherein the semiconductor material is a wide bandgap semiconductor material.

17. The method of claim 13 , wherein the substrate is a semi-insulating substrate.

18. The method of claim 13 , wherein the semiconductor material is SiC.

19. The method of claim 13 , wherein the second mask is a photoresist mask.

20. The method of claim 13 , wherein the third mask is a photoresist mask.

21. The method of claim 13 , further comprising:

depositing ohmic metal on the first and second discrete areas to form source and drain ohmic contacts and on the gate region of the one or more layers of p-type semiconductor to form a gate ohmic contact; and

annealing the source, drain and gate ohmic contacts.

22. The method of claim 21 , further comprising depositing an electrically conductive metal layer in contact with the source, gate and drain ohmic contacts.

23. The method of claim 21 , wherein the ohmic metal is Ni.

24. The method of claim 13 , wherein epitaxially growing one or more layers of semiconductor material of the second conductivity type comprises epitaxially growing two layers of semiconductor material of the second conductivity type, wherein the first layer has a lower doping concentration than the second layer.

25. The method of claim 13 , wherein the regrowth mask material comprises TaC or C.

26. The method of claim 25 wherein the regrowth mask material comprises TaC, the method further comprising:

depositing a layer comprising carbon on the first layer of semiconductor material;

depositing a layer comprising tantalum on the layer comprising carbon; and

annealing to form the layer of regrowth mask material.

27. The method of claim 13 , wherein the first mask comprises Ti or Ni.

28. The method of claim 13 , wherein etching through the first layer of semiconductor material to expose underlying second layer of semiconductor material further comprises etching partially into the second layer of semiconductor material.

29. A device mad by the method of claim 13 .

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2013
From: SS SC IP, LLC
To: POWER INTEGRATIONS, INC.
Reel/Frame 030740/0368 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2011
From: SEMISOUTH LABORATORIES, INC.
To: SS SC IP, LLC
Reel/Frame 026959/0973 →
RELEASE OF SECURITY INTEREST Recorded Jul 25, 2011
From: BLUECREST VENTURE FINANCE MASTER FUND LIMITED
To: SEMISOUTH LABORATORIES, INC.
Reel/Frame 026645/0351 →
SECURITY AGREEMENT Recorded Dec 22, 2009
From: SEMISOUTH LABORATORIES, INC.
To: BLUECREST VENTURE FINANCE MASTER FUND LIMITED
Reel/Frame 023691/0114 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2008
From: MERRETT, JOSEPH NEIL; SANKIN, IGOR
To: SEMISOUTH LABORATORIES, INC.
Reel/Frame 020923/0893 →