Methods and circuits for triode region detection
View Patent ↗The present invention relates to circuits and methods for detecting transistor operation in the triode region including a circuit for a transistor in a constant current source. The circuit comprises a detector having a first input, a second input, and an output. The first input of the detector is coupled to the source of the transistor and the second input of the detector is coupled to the set point terminal of the constant current source. The circuit also comprises a flag coupled to the detector output. The detector has parameters selected so that, when the voltage at the source of the transistor satisfies a reference condition, the output of the detector sets the flag. The reference condition is established relative to the voltage at the set point terminal of the constant current source and relative to the triode transition voltage of the transistor at a selected drain-source current.
1. A detector circuit comprising:
a first input configured to couple to a set point terminal of a constant current source, the constant current source comprising:
a transistor comprising a gate, a source, and a drain; and
an operational amplifier comprising an inverting input, a non-inverting input, and an output;
wherein the gate is coupled to the output of the operational amplifier, the source is coupled to a drive voltage node, the drain is coupled to a load, and the non-inverting input is coupled to the set point terminal;
a second input configured to couple to the inverting input of the operational amplifier and the source of the transistor of the constant current source; and
an output for setting a flag indicating that the transistor is operating in the triode region;
wherein the detector circuit is configured to compare a difference between the voltage at the first input and the voltage at the second input to a reference condition, the reference condition being based on the triode transition voltage of the transistor at a selected drain-source current, and set the flag at the output when the difference exceeds the reference condition.
2. The circuit of claim 1 , wherein the detector sets the flag when the voltage at the source of the transistor is less than the voltage at the set point terminal of the constant current source plus a constant.
3. The circuit of claim 1 , wherein the detector sets the flag when the voltage at the source of the transistor is less than the voltage at the set point terminal of the constant current source times a constant.
4. The circuit of claim 1 , wherein the selected drain-source current is the present drain-source current of the transistor.
5. The circuit of claim 1 , wherein the selected drain-source current is the maximum designed-for drain-source current of the transistor.
6. A liquid crystal display comprising the circuit of claim 1 .
7. A detector circuit comprising:
a first input, configured to couple to a gate of a transistor of a constant current source, the constant current source comprising:
a transistor comprising a gate, a source, and a drain; and
an operational amplifier comprising an inverting input, a non-inverting input, and an output;
wherein the gate is coupled to the output of the operational amplifier, the drain is coupled to a load and the inverting input, and the source is coupled to a drive voltage;
a second input configured to couple to a program voltage source; and
an output for setting a flag indicating that the transistor is operating in the triode region;
wherein the detector circuit is configured to compare a difference between the voltage at the first input and a voltage at the second input to a reference condition, the reference condition being based on the triode transition voltage of the transistor at a selected drain-source current, and set the flag at the output when the difference exceeds the reference condition.
8. The circuit of claim 7 , wherein the detector sets the flag when the voltage at the gate of the transistor deviates from the voltage at the program voltage source by more than a constant.
9. The circuit of claim 7 , wherein the detector sets the flag when the voltage at the gate of the transistor deviates from the voltage at the program voltage source by more than the voltage at the program voltage source times a constant.
10. The circuit of claim 7 , wherein the selected drain-source current is the present drain-source current of the transistor.
11. The circuit of claim 7 , wherein the selected drain-source current is the maximum designed-for drain-source current of the transistor.
12. A liquid crystal display comprising the circuit of claim 7 .
13. A detector circuit comprising:
a first input, configured to couple to a gate of a transistor of a constant current source, the constant current source comprising:
a transistor comprising a gate, a source, and a drain; and
an operational amplifier comprising an inverting input, a non-inverting input, and an output;
wherein the gate is coupled to the output of the operational amplifier, the drain is coupled to a load and the inverting input, and the source is coupled to a drive voltage;
a second input configured to couple to a program voltage source, wherein the voltage at the program voltage source is established relative to the triode transition voltage of the transistor at a selected drain-source current; and
a flag coupled to the output of the detector;
wherein the detector circuit is configured to compare a difference between the voltage at the first input and the voltage at the second input to a reference condition, the reference condition being based on the voltage at the program voltage source, and set the flat at the output when the difference exceeds the reference condition.
14. The circuit of claim 13 , wherein the detector sets the flag when the voltage at the gate of the transistor deviates from the voltage at the program voltage source more than a constant.
15. The circuit of claim 13 , wherein the output of the detector sets the flag when the voltage at the gate of the transistor deviates from the voltage at the program voltage source by more than the voltage at the program voltage source times a constant.
16. The circuit of claim 13 , wherein the selected drain-source current is the present drain-source current of the transistor.
17. The circuit of claim 13 , wherein the selected drain-source current is the maximum designed-for drain-source current of the transistor.
18. A liquid crystal display comprising the circuit of claim 13 .
19. A method performed by a detector circuit, the method comprising:
detecting the voltage at a source of a transistor of a constant current source, the constant current source comprising the transistor and an operational amplifier, the operational amplifier comprising an inverting input and a non-inverting input and an output, wherein a gate of the transistor is coupled to the output operational amplifier, the source is coupled to a drive voltage node, a drain of the transistor is coupled to a load, and the non-inverting input is coupled to a set point terminal;
detecting the voltage at the set point terminal of the constant current source;
comparing a difference between the voltage at the set point terminal and the voltage at the source to a reference condition, the reference condition being based on the triode transition voltage of the transistor at a selected drain-source current; and
setting a flag if the difference exceeds the reference condition.
20. The method of claim 19 , further comprising determining if the voltage at the source of the transistor deviates from the voltage at the set point terminal of the constant current source by more than a constant.
21. The method of claim 19 , further comprising determining if the voltage at the source of the transistor deviates from the voltage at the set point terminal of the constant current source by more than the voltage at the set point terminal of the constant current source times a constant.
22. The method of claim 19 , wherein the selected drain-source current is the present drain-source current of the transistor.
23. The method of claim 19 , wherein the selected drain-source current is the maximum designed-for drain-source current of the transistor.
24. A method performed by a detector circuit, the method comprising:
detecting the voltage at a gate of a transistor of a constant current source, the constant current source comprising the transistor and an operational amplifier, the operational amplifier comprising an inverting input and a non-inverting input and an output, wherein the gate is coupled to the output of the operational amplifier, the drain is coupled to a load and the inverting input, and the source is coupled to a drive voltage;
detecting the voltage at a program voltage source;
comparing a difference between the voltage at the gate and the voltage at the program voltage source to a reference condition, the reference condition being based on the triode transition voltage of the transistor at a selected drain-source current; and
setting a flag if the difference exceeds the reference condition.
25. The method of claim 24 , further comprising determining if the voltage at the gate of the transistor deviates from the voltage at the program voltage source by more than a constant.
26. The method of claim 24 , further comprising determining if the voltage at the source of the transistor deviates from the voltage at the program voltage source by more than the voltage at the program voltage source times a constant.
27. The method of claim 24 , wherein the selected drain-source current is the present drain-source current of the transistor.
28. The method of claim 24 , wherein the selected drain-source current is the maximum designed-for drain-source current of the transistor.
29. A method performed by a detector circuit, the method comprising:
detecting the voltage at a gate of a transistor of a constant current source, the constant current source comprising the transistor and an operational amplifier, the operational amplifier comprising an inverting input and a non-inverting input and an output, wherein the gate is coupled to the output of the operational amplifier, the drain is coupled to a load and the inverting input, and the source is coupled to a drive voltage;
establishing the voltage of a program voltage source relative to the triode transition voltage of the transistor at a selected drain-source current;
detecting the voltage at the program voltage source;
establishing a reference condition relative to the voltage at the program voltage source;
determining if the voltage at the gate of the transistor satisfies the reference condition; and
setting a flag if the reference condition is satisfied.
30. The method of claim 29 , further comprising determining if the voltage at the gate of the transistor deviates from the voltage at the program voltage source by more than a constant.
31. The method of claim 29 , further comprising determining if the voltage at the source of the transistor deviates from the voltage at the program voltage source by more than the voltage at the program voltage source times a constant.
32. The method of claim 29 , wherein the selected drain-source current is the present drain-source current of the transistor.
33. The method of claim 29 , wherein the selected drain-source current is the maximum designed-for drain-source current of the transistor.