IP Library Granted Patent US 7,906,371
Granted Patent B2
US 7,906,371 · App. 12/128,116 · Granted Mar 15, 2011

Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shield

Assignee: STATS ChipPAC, Ltd.
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Quick Facts
Patent No.
US 7,906,371
App. No.
12/128,116
Granted
Mar 15, 2011
Kind
B2
Abstract

A shielded semiconductor device is made by embedding a ground shield between layers of a substrate. Semiconductor die are mounted to the substrate over the ground shields. An encapsulant is formed over the semiconductor die and substrate. The encapsulant is diced to form dicing channels between the semiconductor die. A plurality of openings is drilled into the substrate along the dicing channels down through the ground shield on each side of the semiconductor die. A top shield is formed over the semiconductor die. The openings in the substrate are filled with a shielding material to electrically and mechanically connect the top shield to the ground shield. The substrate is singulated to separate the semiconductor die with top shield and ground shield into individual semiconductor devices. IPDs in the semiconductor die generate electromagnetic interference which is blocked by the respective top shield and ground shield.

Claims (56)

1. A method of making a shielded semiconductor device, comprising:

providing a multi-layer substrate;

disposing a ground shield between layers of the substrate, the ground shield being electrically connected to a ground point;

mounting a plurality of semiconductor die to the substrate over the ground shield, the ground shield extending beyond a footprint of the plurality of semiconductors die;

forming an encapsulant over the semiconductor die and substrate;

dicing the encapsulant to form dicing channels between the semiconductor die;

forming a plurality of openings in the substrate along the dicing channels through the ground shield which extends under dicing channels;

forming a top shield over the semiconductor die;

filling the openings in the substrate with shielding material to electrically and mechanically connect the top shield to the ground shield.

2. The method of claim 1 , wherein the top shield and ground shield are each made with shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.

3. The method of claim 1 , wherein the step of forming openings in the substrate includes drilling holes in the substrate along the dicing channels through the ground shield.

4. The method of claim 1 , wherein the openings in the substrate are formed on each side of the semiconductor die.

5. The method of claim 1 , further including singulating the substrate to separate the semiconductor die with the top shield and ground shield into individual semiconductor devices.

6. The method of claim 1 , further including disposing an integrated passive device in the semiconductor die, the integrated passive device generating electromagnetic interference which is blocked by the respective top shield and ground shield.

7. The method of claim 6 , wherein the respective top shield and ground shield inhibit electromagnetic interference from reaching the integrated passive device in the semiconductor die.

8. A method of making a shielded semiconductor device, comprising:

providing a substrate;

embedding a ground shield within the substrate;

mounting a semiconductor die to the substrate over the ground shield, the ground shield extending beyond a footprint of the semiconductor die;

forming an encapsulant over the semiconductor die and substrate;

forming dicing channels around the semiconductor die;

forming a plurality of openings in the substrate along the dicing channels through the ground shield which extends under the dicing channels;

forming a top shield over the semiconductor die; and

filling the openings in the substrate with conductive material to electrically and mechanically connect the top shield to the ground shield.

9. The method of claim 8 , wherein the substrate is a multi-layer substrate and the ground shield is disposed between layers of the substrate.

10. The method of claim 8 , wherein the step of forming openings in the substrate includes drilling holes in the substrate along the dicing channels through the ground shield.

11. The method of claim 8 , wherein the openings in the substrate are formed on each side of the semiconductor die.

12. The method of claim 8 , wherein the top shield and ground shield are each made with a shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.

13. The method of claim 8 , further including disposing an integrated passive device in the semiconductor die, the integrated passive device generating electromagnetic interference which is blocked by the top shield and ground shield.

14. A method of making a shielded semiconductor device, comprising:

providing a substrate;

embedding a ground shield within the substrate;

mounting a semiconductor die to the substrate over the ground shield;

forming a plurality of openings in the substrate through the ground shield;

forming a top shield over the semiconductor die; and

filling the openings in the substrate with conductive material to electrically and mechanically connect the top shield to the ground shield.

15. The method of claim 14 , wherein the substrate is a multi-layer substrate and the ground shield is disposed between layers of the substrate.

16. The method of claim 14 , further including:

forming an encapsulant over the semiconductor die and substrate; and

forming dicing channels around the semiconductor die.

17. The method of claim 14 , wherein the step of forming openings in the substrate includes drilling holes in the substrate through the ground shield.

18. The method of claim 14 , wherein the openings in the substrate are formed on each side of the semiconductor die.

19. The method of claim 14 , further including disposing an integrated passive device in the semiconductor die, the integrated passive device generating electromagnetic interference which is blocked by the top shield and ground shield.

20. A method of making a shielded semiconductor device, comprising:

providing a substrate;

embedding a ground shield within the substrate;

mounting a semiconductor die to the substrate over the ground shield;

forming an encapsulated over the semiconductor die and substrate;

forming dicing channels around the semiconductor die;

forming a plurality of openings in the substrate along the dicing channels through the ground shield;

forming a top shield over the semiconductor die; and

filling the openings in the substrate with conductive material to electrically and mechanically connect the top shield to the ground shield.

21. The method of claim 20 , wherein the substrate is a multi-layer substrate and the ground shield is disposed between layers of the substrate.

22. The method of claim 20 , wherein the steps of forming openings in the substrate includes drilling holes in the substrate along the dicing channels through the grounds shield.

23. The method of claim 20 , wherein the top shield and ground shield are each made with a shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.

24. The method of claim 20 , further including disposing an integrated passive device in the semiconductor die, the integrated passive device generating electromagnetic interference which is blocked by the top shield and ground shield.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 064783 FRAME 0896. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE CHANGE OF NAME. Recorded Sep 22, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065015/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 14, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064962/0123 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0292) Recorded Aug 30, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE.LTE.
Reel/Frame 064783/0896 →
RELEASE OF SECURITY INTEREST Recorded Jun 12, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052924/0007 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0292 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2008
From: KIM, OHHAN; LEE, KYUNGHOON; KIM, SUNMI
To: STATS CHIPPAC, LTD.
Reel/Frame 021008/0963 →
Continuity (1)
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