Integrated power detector with temperature compensation for fully-closed loop control
View Patent ↗An amplifier circuit comprises a detection power input circuit for receiving an RF signal, and a bias circuit that includes an output for generating a bias signal in response to a reference control voltage. The power detector further comprises a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal. The amplifier circuit further comprises a power amplifier coupled to the bias circuit. The power amplifier includes a driver stage providing the RF signal. The detection circuit compensates temperature variation of the inputted detection voltage of the received RF signal.
1. A power detector comprising:
a detection power input circuit for receiving an RF signal;
a bias circuit including an output for generating a bias signal in response to a reference control voltage;
a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal, the detection circuit forming a current mirror with the bias circuit.
wherein a power amplifier is coupled to the bias circuit, the power amplifier comprising a driver stage and a power stage with the driver stage providing said RF signal;
wherein the driver stage comprises:
a first capacitor including a first terminal for receiving an RF power signal and including a second terminal,
a first resistor including a first terminal coupled to the second terminal of the first capacitor and including a second terminal coupled to a power control voltage terminal for receiving the power control voltage from the detection circuit,
a first transistor including a base coupled to the second terminal of the first capacitor, including an emitter coupled to a ground terminal and including a collector coupled to a detector power input terminal for providing the RF signal to the detection power input circuit, and
a first inductor including a first terminal coupled to the collector of the first transistor and including a second terminal coupled to a voltage supply terminal,
wherein the power stage comprises:
a second capacitor including a first terminal coupled to the emitter of the first transistor and including a second terminal,
a second resistor including a first terminal coupled to the second terminal of the second capacitor and including a second terminal coupled to the second terminal of the first resistor,
a second transistor including a base coupled to the second terminal of the second capacitor, including an emitter coupled to the ground terminal, and including a collector,
a second inductor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the voltage supply terminal, and
a filter coupled between the collector of the second transistor and an RF power output terminal for providing an RF power output signal.
2. The power detector of claim 1 wherein the filter comprises:
a third capacitor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the ground terminal,
a third inductor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the RF power output terminal, and
a fourth capacitor including a first terminal coupled to the second terminal of the third inductor and including a second terminal coupled to the ground terminal.
3. A power detector comprising:
a detection power input circuit for receiving an RF signal;
a bias circuit including an output for generating a bias signal in response to a reference control voltage;
a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal, the detection circuit forming a current mirror with the bias circuit.
wherein a power amplifier is coupled to the bias circuit, the power amplifier comprising a driver stage providing said RF signal;
wherein the detection power input circuit comprises:
a first resistor including a first terminal for receiving the RF signal and including a second terminal,
a first capacitor including a first terminal coupled to the second terminal of the first resistor and including a second terminal, and
a second resistor including a first terminal coupled to the second terminal of the first capacitor and including a second terminal,
wherein the bias circuit comprises:
a third resistor including a first terminal coupled to a reference voltage terminal and including a second terminal coupled to the second terminal of the second resistor,
a first transistor including a collector coupled to the second terminal of the third resistor, including a base coupled to said collector, and including an emitter, and
a fourth resistor including a first terminal coupled to the emitter of the first transistor and including a second terminal coupled to a ground terminal,
wherein the detection circuit comprises:
a second transistor including a collector coupled to a voltage supply terminal, including a base coupled to the first terminal of the second resistor, and including an emitter,
a fifth resistor including a first terminal coupled to the emitter of the second transistor and including a second terminal coupled to the ground terminal,
a second capacitor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the ground terminal, and
a sixth resistor including a first terminal coupled to the collector of the second transistor and including a second terminal for providing the detector voltage output,
wherein the power amplifier comprises a driver stage and a power stage,
wherein the driver stage comprises:
a third capacitor including a first terminal for receiving an RF power signal and including a second terminal,
a seventh resistor including a first terminal coupled to the second terminal of the third capacitor and including a second terminal coupled to a power control voltage terminal for receiving the power control voltage from the detection circuit,
a third transistor including a base coupled to the second terminal of the first capacitor, including an emitter coupled to the ground terminal and including a collector coupled to a detector power input terminal for providing the RF signal to the detection power input circuit, and
a first inductor including a first terminal coupled to the collector of the third transistor and including a second terminal coupled to the voltage supply terminal,
wherein the power stage comprises:
a fourth capacitor including a first terminal coupled to the collector of the third transistor and including a second terminal,
an eighth resistor including a first terminal coupled to the second terminal of the fourth capacitor and including a second terminal coupled to the second terminal of the seventh resistor,
a fourth transistor including a base coupled to the second terminal of the fourth capacitor, including an emitter coupled to the ground terminal, and including a collector,
a second inductor including a first terminal coupled to the collector of the fourth transistor and including a second terminal coupled to the voltage supply terminal, and
a filter coupled between the collector of the fourth transistor and an RF power output terminal for providing an RF power output signal.
4. The power detector of claim 3 , wherein the filter comprises:
a fifth capacitor including a first terminal coupled to the collector of the fourth transistor and including a second terminal coupled to the ground terminal,
a third inductor including a first terminal coupled to the collector of the fourth transistor and including a second terminal coupled to the RF power output terminal, and
a sixth capacitor including a first terminal coupled to the second terminal of the third inductor and including a second terminal coupled to the ground terminal.