Calibration of voltage controlled oscillators
View Patent ↗A calibration circuit ( 20, 50 ) and method ( 60 ) for calibrating the bias current of a VCO ( 10, 40 ) to minimize phase noise. The calibration circuit ( 20, 50 ) monitors the average voltage at the common-mode node of the VCO ( 10, 40 ) while varying the bias current over a predetermined range. The calibration circuit ( 20, 50 ) identifies the bias current associated with the minimum average common-mode voltage and utilizes this bias current for calibrating the biasing transistor of the VCO ( 10, 40 ).
1. An information-processing system, comprising:
a voltage-controlled oscillator, including a calibration circuit for altering a bias current of said voltage-controlled oscillator and for monitoring an average voltage at a common-mode node of said voltage-controlled oscillator, wherein said calibration circuit identifies an optimum bias current corresponding to an extreme value of said average voltage and calibrates said voltage-controlled oscillator using said optimum bias current to minimize 1/f 3 phase noise.
2. The information-processing system of claim 1 wherein said calibration circuit comprises a calibration-logic circuit.
3. The information-processing system of claim 1 wherein said extreme value is substantially equal to a maximum value of said average voltage at said common-mode node of said voltage-controlled oscillator.
4. The information-processing system of claim 1 wherein said extreme value is substantially equal to a minimum value of said average voltage at said common-mode node of said voltage-controlled oscillator.
5. The information-processing system of claim 1 wherein said calibration circuit comprises first and second sample-and-hold circuits for sampling values of said average voltage and a comparator for comparing values of said average voltage.
6. The information-processing system of claim 1 wherein said calibration circuit comprises a sample-and-hold circuit for sampling values of said average voltage and an analog-to-digital converter for converting said values from analog to digital signals.
7. The information-processing system of claim 6 wherein said calibration circuit further comprising a filter for filtering said average voltage and a buffer for temporarily buffering said average voltage.