IP Library Granted Patent US 7,960,781
Granted Patent B2
US 7,960,781 · App. 12/206,516 · Granted Jun 14, 2011

Semiconductor device having vertical charge-compensated structure and sub-surface connecting layer and method

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Quick Facts
Patent No.
US 7,960,781
App. No.
12/206,516
Granted
Jun 14, 2011
Kind
B2
Abstract

In one embodiment, a semiconductor device is formed having vertical localized charge-compensated trenches, trench control regions, and sub-surface doped layers. The vertical localized charge-compensated trenches include at least a pair of opposite conductivity type semiconductor layers. The trench control regions are configured to provide a generally vertical channel region electrically coupling source regions to the sub-surface doped layers. The sub-surface doped layers are further configured to electrically connect the drain-end of the channel to the vertical localized charge compensation trenches. Body regions are configured to isolate the sub-surface doped layers from the surface of the device.

Claims (39)

1. A semiconductor device comprising:

a body of semiconductor material having a major surface and formed with a vertical charge compensation structure, wherein the vertical charge compensation structure includes at least one conduction layer of a first conductivity type semiconductor material and at least one compensation layer of a second conductivity type semiconductor material, wherein the second conductivity type is opposite to the first conductivity type;

a body region of the second conductivity type formed in the body of semiconductor material adjacent to the vertical charge compensation structure;

a source region of the first conductivity type formed adjacent the body region;

a trench control structure formed adjacent the source and body regions, wherein the source region is interposed between the trench control structure and the vertical charge compensation structure, wherein the trench control structure is configured to form a channel region within the body region; and

a doped region of the first conductivity type formed spaced apart from the major surface and underlying the body region and extending from a drain end of the channel region to the at least one conduction layer.

2. The device of claim 1 further comprising a conductive layer overlying the major surface and electrically coupled to the source region, the body region and the at least one compensation layer.

3. The device of claim 1 , wherein a portion of the body of semiconductor material where the body region is formed comprises the second conductivity type.

4. The device of claim 1 , wherein the body of semiconductor material comprises the first conductivity type.

5. The device of claim 1 , wherein the vertical charge compensation structure comprises a generally vertical trench having sidewalls and a lower surface, and wherein the at least one conduction layer overlies and adjoins the sidewalls and the lower surface, and wherein the at least one compensation layer overlies the conduction layer.

6. The device of claim 1 , wherein the body region electrically isolates the doped region from the major surface.

7. The device of claim 1 further comprising a body contact region of the second conductivity type formed in the body region, wherein the body contact region overlies and forms an ohmic contact to the at least one compensation layer.

8. A semiconductor device comprising:

a semiconductor region having a major surface;

a vertical charge compensation structure formed in the semiconductor region extending from the major surface, wherein the vertical charge compensation structure includes a first semiconductor layer of a first conductivity type adjoining the semiconductor region, and a second semiconductor layer of a second conductivity type opposite to the first conductivity type adjoining the first semiconductor layer, and wherein the first semiconductor layer is a conduction layer and wherein the second semiconductor layer is a compensation layer;

a trench control structure formed in the semiconductor region laterally spaced apart from the vertical charge compensation structure;

a body region adjoining and between the trench control and the vertical charge compensation structures, wherein the body region has the second conductivity type, and wherein the trench control structure is configured to form a channel region in the body region;

a source region of the first conductivity type overlying a portion of the body region and adjoining the trench control structure;

a doped region of the first conductivity spaced apart from the major surface and underlying the body region and extending from a drain end of the channel region to the conduction layer; and

a conductive layer overlying the major surface and electrically coupled to the source region, the body region and the compensation layer.

9. The device of claim 8 further comprising a buffer layer formed overlying the second semiconductor layer.

10. The device of claim 8 further comprising a buffer layer formed interposed between the first and second semiconductor layers.

11. The device of claim 8 , wherein the conductive layer contacts vertical and horizontal surfaces of the source region.

12. The device of claim 8 further comprising a body contact region of the second conductivity type formed in portions of the body region.

13. The device of claim 12 , wherein the body contact region overlies and forms an ohmic contact to the compensation layer.

14. The device of claim 8 , wherein the semiconductor region comprises a semiconductor substrate of the first conductivity type and a semiconductor layer of the second conductivity type overlying the semiconductor substrate, and wherein the body region is formed in the semiconductor layer.

15. The device of claim 8 , wherein the semiconductor region comprises a semiconductor substrate of the first conductivity and a semiconductor layer of the first conductivity type overlying the semiconductor substrate, and wherein the doped region has a higher dopant concentration than the semiconductor layer.

16. A semiconductor device comprising:

a body of semiconductor material having a major surface;

vertical charge compensation structure formed in the body of semiconductor material including:

a generally vertical trench extending from the major surface having sidewalls and a lower surface;

a conduction layer of a first conductivity type semiconductor material formed overlying and adjoining the sidewalls and the lower surface; and

a compensation layer of a second conductivity type semiconductor material overlying the conduction layer, wherein the second conductivity type is opposite to the first conductivity type;

a body region of the second conductivity type formed in the body of semiconductor material adjacent to the vertical charge compensation structure;

a source region of the first conductivity type formed adjacent the body region;

a trench control structure formed adjacent the source and body regions, wherein the source region is interposed between the trench control structure and the vertical charge compensation structure, and wherein the trench control structure is configured to form a channel region within the body region;

a doped region of the first conductivity type formed spaced apart from the major surface and underlying the body region and configured to provide a sub-surface current path between a drain end of the channel region and the conduction layer; and

a body contact region of the second conductivity type formed in the body region and having a higher dopant concentration than the body region, wherein the body contact region overlies the vertical charge compensation structure to form an ohmic contact to the compensation layer.

17. The structure of claim 16 , wherein the body of semiconductor material where the body region is formed comprises the second conductivity type.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038631/0345 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A. (ON ITS BEHALF AND ON BEHALF OF ITS PREDECESSOR IN INTEREST, CHASE MANHATTAN BANK)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038632/0074 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
SECURITY AGREEMENT Recorded Jan 19, 2010
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 023826/0725 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2008
From: LOECHELT, GARY H.; ZDEBEL, PETER J.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 021497/0034 →