Method of improving solid-state image sensor sensitivity
View Patent ↗An imaging apparatus includes (a) a full-frame, charge-coupled device having (i) a conductive layer of a first dopant type; (ii) a plurality of pixels arranged as a charge-coupled device in the conductive layer that collects charge in response to incident light and transfers the collected charge; (iii) an overflow drain of a dopant type opposite the first type disposed in the conductive layer and laterally adjacent to each pixel; and the apparatus having (b) a voltage supply connected to the lateral overflow drain that is at a first voltage during readout and at a second voltage that is lower than the first voltage during integration.
1. A method for operating an imaging apparatus comprising:
(a) providing a conductive layer of a first dopant type;
(b) providing a plurality of pixels arranged as a charge-coupled device in the conductive layer that collects charge in response to incident light and transfers the collected charge;
(c) providing an overflow drain of a dopant type opposite the first type disposed in the conductive layer and laterally adjacent to each pixel; and
(d) supplying a first voltage to the lateral overflow drain during readout and supplying a second voltage that is lower than the first voltage and greater than a voltage of the conductive layer during integration.
2. The method as in claim 1 wherein the first dopant type is p-type.
3. The method as in claim 1 wherein the lower voltage is substantially close to the voltage of the conductive layer.
4. The method as in claim 3 wherein the voltage of the conductive layer comprises a ground potential.
5. The method as in claim 1 wherein the dopant type of the overflow drain is n-type.
6. A method for operating an imaging apparatus that includes a plurality of pixels in a conductive layer and an overflow drain laterally adjacent to each pixel in the conductive layer, wherein the plurality of pixels are arranged as a charge-coupled device that collects and transfers charge, the method comprising:
(a) during readout, supplying a first voltage to the lateral overflow drain; and
(b) during integration, supplying a second voltage to the lateral overflow drain that is lower than the first voltage and greater than a voltage of the conductive layer.
7. The method as in claim 6 wherein the first dopant type is p-type.
8. The method as in claim 6 wherein the voltage of the conductive layer comprises a ground potential.