Semiconductor package system with through silicon via interposer

1. A method for manufacturing a semiconductor package system comprising:

providing a top package, a through silicon via interposer embedded in the top package;

providing a bottom package having a bottom semiconductor die with a top connection adjacent a center active face thereof, a bottom die mold with the top connection exposed from the bottom die mold, a substrate interposer being embedded in the bottom package, the bottom semiconductor die being attached to the substrate interposer; and

attaching the top package to the bottom package, the top package having the through silicon via interposer having a via connected to the top connection wherein providing the top package includes providing the top package with a top semiconductor die and a top substrate interposer embedded in the top package, the top semiconductor die being attached to the through silicon via interposer.

2. The method as claimed in claim 1 wherein providing the top package includes providing the top package with a top semiconductor die embedded in the top package, the top semiconductor die being attached to the through silicon via interposer.

3. The method as claimed in claim 1 wherein providing the top package includes providing the top package with a top semiconductor flip chip die embedded in the top package, the top semiconductor flip chip die being attached to the through silicon via interposer.

4. The method as claimed in claim 1 wherein providing the top package includes providing the top package with a top internal stacking module embedded in the top package, the top internal stacking module being attached to the through silicon via interposer.

5. A method of manufacturing a semiconductor package system comprising:

forming units of a top semiconductor die attached to a through silicon via interposer on a bottom carrier, each unit being separated from each other;

encapsulating the units of the top semiconductor die attached to the through silicon via interposer with a top die mold;

attaching a top on-chip solder ball to the through silicon via interposer, the top on-chip solder ball is at a center face of the through silicon via interposer, top package being thus formed; and

connecting the top package to a bottom package at a center active face of the top package and the bottom package, a bottom die mold with the top connection exposed from the bottom die mold, wherein providing the top package includes providing the top package with a top semiconductor die and a top substrate interposer embedded in the top package, the top semiconductor die being attached to the through silicon via interposer.

6. The method as claimed in claim 5 wherein forming units of the top semiconductor die attached to the through silicon via interposer on the bottom carrier includes:

attaching the top semiconductor die to the through silicon via interposer through a die paste layer, a top bonding pad being on the top semiconductor die;

attaching one end of a top bonding wire to the top bonding pad and the other end of the top bonding wire to a through silicon via interposer pad on the through silicon via interposer;

attaching a wire lock layer to the top bonding wire, the bonding wire being wrapped around by the wire lock layer; and

sawing the through silicon via interposer to form a top groove, each unit of the top semiconductor die attached to the through silicon via interposer being thus separated from each other.

7. The method as claimed in claim 5 wherein forming units of the top semiconductor die attached to the through silicon via interposer on the bottom carrier includes:

sawing the through silicon via interposer to form a through silicon via interposer groove;

attaching the top semiconductor die to the through silicon via interposer through a die paste layer, a top bonding pad being on the top semiconductor die; and

attaching one end of a top bonding wire to the top bonding pad and the other end of the top bonding wire to the through silicon via interposer pad on the through silicon via interposer, each unit of the top semiconductor die attached to the through silicon via interposer being separate from each other.

8. The method as claimed in claim 5 wherein attaching the top package to the bottom package includes attaching the top on-chip solder ball of the top package to a bottom on-chip solder ball of the bottom package.

9. The method as claimed in claim 5 wherein connecting the top package to the bottom package at the center active face of the top package and the bottom package includes connecting the top package to the bottom package having a bottom semiconductor die with a top connection adjacent the center active face thereof, a bottom through silicon via interposer being embedded in the bottom package, the bottom semiconductor die being attached to the bottom through silicon via interposer.

10. A semiconductor package system comprising:

a top package, a through silicon via interposer embedded in the top package; and

a bottom package having a bottom semiconductor die with a top connection adjacent a center active face thereof, a substrate interposer being embedded in the bottom package, the bottom semiconductor die being attached to the substrate interposer, a bottom die mold with the top connection exposed from the bottom die mold, the top package being attached to the bottom package, the top package having the through silicon via interposer having a via connected to the top connection wherein the top package has a top semiconductor die and a top substrate interposer embedded in the top package, the top semiconductor die being attached to the through silicon via interposer.

11. The system as claimed in claim 10 wherein the top package has a top semiconductor die embedded in the top package, the top semiconductor die being attached to the through silicon via interposer.

12. The system as claimed in claim 10 wherein the top package has a top semiconductor flip chip die embedded in the top package, the top semiconductor flip chip die being attached to the through silicon via interposer.

13. The system as claimed in claim 10 wherein the top package has a top internal stacking module embedded in the top package, the top internal stacking module being attached to the through silicon via interposer.

14. The system as claimed in claim 10 wherein:

the top package has a top semiconductor die embedded in the top package, the top semiconductor die being attached to the through silicon via interposer; and

further comprising:

a package solder ball attached to the substrate interposer of the bottom package.

15. The system as claimed in claim 14 wherein the bottom package is attached to the top package through a contact between a top on-chip solder ball and a bottom on-chip solder ball.

16. The system as claimed in claim 14 wherein the top package includes a top semiconductor die having a top bonding pad on a top semiconductor die and a top bonding wire, one end of the top bonding wire being attached to the top bonding pad and the other end of the top bonding wire being attached to a through silicon via interposer pad on the through silicon via interposer.

17. The system as claimed in claim 14 wherein the top package includes a top semiconductor die having a top bonding pad on the top semiconductor die and a top bonding wire, the top bonding wire being wrapped around with a wire lock layer, one end of the top bonding wire being attached to the top bonding pad and the other end of the top bonding wire being attached to a through silicon via interposer pad on the through silicon via interposer.

18. The system as claimed in claim 14 wherein the top package includes a top semiconductor die is attached to the through silicon via interposer through a die paste layer.