IP Library Granted Patent US 7,965,152
Granted Patent B2
US 7,965,152 · App. 12/326,791 · Granted Jun 21, 2011

Attenuator with a control circuit

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Quick Facts
Patent No.
US 7,965,152
App. No.
12/326,791
Granted
Jun 21, 2011
Kind
B2
Abstract

An attenuator system comprises an attenuator and a control circuit for controlling the attenuation of the attenuator. In one embodiment, the attenuator comprises two diodes or two diode connected transistors, and the control circuit comprises two transistors as the only active devices. In another embodiment, the control circuit comprises another transistor in a shut down circuit.

Claims (49)

1. An attenuator system comprising:

an attenuator including a first input terminal for receiving a radio frequency power signal, including second and third input terminals for receiving first and second control signals, respectively, wherein said attenuator being controlled by only said first and second control signals, and including a first output terminal for providing a power signal in response to the radio frequency power signal and the first and second control signals; and

a control circuit including a fourth input terminal for receiving a control voltage, including a fifth input terminal for receiving a supply voltage, and including second and third output terminals for providing the first and second control signals.

2. The attenuator system of claim 1 wherein the attenuator controls a power level of the power signal in response to the first and second control signals.

3. The attenuator system of claim 1 wherein the attenuator comprises two diodes and the control circuit comprises two transistors.

4. The attenuator system of claim 1 wherein the control circuit comprises:

a first resistor including a first terminal coupled to the fourth input terminal of the control circuit and including a second terminal;

a first transistor including a base coupled to the second terminal of the first resistor, including an emitter coupled to a ground node, and including a collector;

a second resistor including a first terminal coupled to the fifth input terminal of the control circuit and including a second terminal coupled to the collector of the first transistor;

a third resistor including a first terminal coupled to the collector of the first transistor and including a second terminal coupled to the second output terminal of the control circuit;

a fourth resistor including a first terminal coupled to the collector of the first transistor and including a second terminal;

a second transistor including a base coupled to the second terminal of the fourth resistor, including an emitter coupled to the ground node, and including a collector;

a fifth resistor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the fifth input terminal of the control circuit; and

a sixth resistor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the third output terminal of the control circuit.

5. The attenuator system of claim 4 wherein the first and second transistors comprise a heterojunction bipolar transistor.

6. The attenuator system of claim 4 wherein the attenuator comprises:

a seventh resistor including a first terminal coupled to the first input terminal and including a second terminal;

an eighth resistor including a first terminal coupled to the second terminal of the seventh resistor and including a second terminal coupled to the first output terminal;

a first diode including an cathode coupled to the first terminal of the seventh resistor and including an anode coupled to the second input terminal;

a capacitor including a first terminal coupled to the anode of the first diode and including a second terminal coupled to the second terminal of the eighth resistor;

a second diode including an anode coupled to the second terminal of the seventh resistor and including a cathode; and

a ninth resistor including a first terminal coupled to the cathode of the second diode and including a second terminal coupled to the ground node.

7. The attenuator system of claim 4 wherein the attenuator comprises:

a seventh resistor including a first terminal coupled to the first input terminal and including a second terminal;

an eighth resistor including a first terminal coupled to the second terminal of the seventh resistor and including a second terminal coupled to the first output terminal;

a first transistor including a collector coupled to the first terminal of the seventh resistor, including a base, and including an emitter coupled to said base and to the second input terminal of the control circuit;

a capacitor including a first terminal coupled to the emitter of the first transistor and including a second terminal coupled to the second terminal of the eighth resistor;

a second transistor including a base, including an emitter coupled to said base and to the second terminal of the seventh resistor; and

a ninth resistor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the ground node.

8. The attenuator system of claim 7 wherein the first and second transistors comprise a heterojunction bipolar transistor.

9. The attenuator system of claim 1 wherein the control circuit comprises a shutdown voltage terminal and further comprises:

a first resistor including the first terminal coupled to the first terminal control circuit and including a second terminal;

a first transistor including a base coupled to the second terminal of the first resistor, including an emitter, and including a collector;

a second resistor including a first terminal coupled to the second terminal of the control circuit and including a second terminal coupled to the collector of the first transistor;

a third resistor including a first terminal coupled to the collector of the first transistor and including a second terminal coupled to the second output terminal of the control circuit;

a fourth resistor including a first terminal coupled to the collector of the first transistor and including a second terminal;

a second transistor including a base coupled to the second terminal of the fourth resistor, including an emitter, and including a collector;

a fifth resistor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the fifth input terminal of the control circuit;

a sixth resistor including a first terminal coupled to the collector of the second transistor and including a second terminal coupled to the third output terminal of the control circuit;

a third transistor including a collector coupled to the emitters of the first and second transistors, including a base, and including an emitter coupled to a ground node; and

a seventh resistor including a first terminal coupled to the base of the third transistor and including a second terminal coupled to the shutdown voltage terminal.

10. The attenuator system of claim 9 wherein the first, second and third transistors comprise a heterojunction bipolar transistor.

11. The attenuator system of claim 1 further comprising an amplifier including an input terminal coupled to the first output terminal of the attenuator and including an output terminal for providing an output RF signal.

12. The attenuator system of claim 11 , wherein the amplifier comprising:

a first capacitor including a first terminal coupled to the input terminal of the amplifier and including a second terminal;

a first resistor including a first terminal coupled to the first terminal of the first capacitor and including a second terminal coupled to a bias voltage terminal;

a first transistor including a base coupled to the second terminal of the first capacitor, including an emitter coupled to a ground node, and including a collector;

a first inductor including a first terminal coupled to the collector of the first transistor and including a second terminal coupled to a DC supply terminal; and

a second capacitor including a first terminal coupled to the collector of the first transistor and including a second terminal coupled to the output terminal of the amplifier.

Assignments (16)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2011
From: SILICON STORAGE TECHNOLOGY, INC.
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 026213/0515 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2008
From: KOBAYASHI, BUN; SCHELL, STEVEN W.; CHOW, PEI-MING DANIEL; CHANG, MAU-CHUNG FRANK
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 021916/0295 →