IP Library Granted Patent US 7,851,260
Granted Patent B2
US 7,851,260 · App. 12/332,146 · Granted Dec 14, 2010

Method for manufacturing a semiconductor device

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Quick Facts
Patent No.
US 7,851,260
App. No.
12/332,146
Granted
Dec 14, 2010
Kind
B2
Abstract

A method for manufacturing a semiconductor device is disclosed. As a part of the method, one surface of a substrate is molded with resin where the substrate and the resin are heated in a first heating process and maintained in a flat condition. The substrate and the resin are returned to room temperature while being maintained in the flat condition after the first heating process. The resin is cut after the substrate and the resin are returned to room temperature from a surface of the resin that is opposite the surface of the resin where the substrate contacts the resin. The substrate is left intact when the resin is cut. Thereafter, the substrate is separated.

Claims (40)

1. A method for manufacturing a semiconductor device, the method comprising:

molding one surface of a substrate with resin;

heating the substrate and the resin in a first heating process while maintaining the substrate and the resin in a flat condition;

returning the substrate and the resin to room temperature while the substrate and the resin is being maintained in the flat condition after the first heating process;

cutting the resin after returning the substrate and the resin to room temperature from a surface of the resin that is opposite the surface of the resin where the substrate contacts the resin wherein the substrate is left intact; and

separating the substrate.

2. The method for manufacturing a semiconductor device according to claim 1 , further comprising heating the substrate after cutting the resin and before separating the substrate in the second heating process.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein a plurality of cutting plane lines associated with cutting the resin overlaps with at least one of a plurality of cutting plane lines associated with separating the substrate.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein a cutting plane line associated with separating the substrate includes a cutting plane line associated with cutting the resin.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein the cutting the resin is in a width direction.

6. The method for manufacturing a semiconductor device according to claim 1 , wherein the cutting the resin is in a lattice shape.

7. The method for manufacturing a semiconductor device according to claim 1 , wherein the molding of the surface of the substrate with the resin includes heating the substrate and the resin in a third heating process.

8. The method for manufacturing a semiconductor device according to claim 2 , wherein the second heating process is included in a process for providing terminals on the substrate.

9. A method for manufacturing a semiconductor device, the method comprising:

forming a square shaped substrate;

molding one surface of the square substrate with a square shaped resin layer;

heating the square shaped substrate and the square shaped resin layer in a first heating process while maintaining the square shaped substrate and the square shaped resin layer in a flat condition;

returning the square shaped substrate and the square shaped resin layer to room temperature while the square shaped substrate and the square shaped resin layer is being maintained in the flat condition after the first heating process;

cutting the square shaped resin layer in a lattice pattern after returning the square shaped substrate and the square shaped resin layer to room temperature from a surface of the square shaped resin layer that is opposite a surface of the square shaped resin layer wherein the square shaped resin layer contacts the square shaped substrate;

separating the square shaped substrate; and

heating the square shaped substrate after the cutting of the square shaped resin and before the separating of the square shaped substrate in a second heating process.

10. The method for manufacturing a semiconductor device according to claim 9 , wherein a plurality of cutting plane lines associated with cutting the resin overlaps with at least one of a plurality of cutting plane lines associated with separating the substrate.

11. The method for manufacturing a semiconductor device according to claim 9 , wherein a cutting plane line associated with separating the substrate includes a cutting plane line associated with cutting the resin.

12. The method for manufacturing a semiconductor device according to claim 9 , wherein the cutting the resin is in a width and a length direction.

13. The method for manufacturing a semiconductor device according to claim 9 , wherein the cutting the resin is in a lattice shape that leaves the substrate intact.

14. The method for manufacturing a semiconductor device according to claim 9 , wherein the molding of the surface of the substrate with the resin includes heating the substrate and the resin in a third heating process.

15. The method for manufacturing a semiconductor device according to claim 9 , wherein the second heating process is included in a process for providing terminals on the substrate.

16. A method for manufacturing a semiconductor device package, the method comprising:

forming a substrate;

performing die bonding on the substrate;

performing wire bonding of the die on the substrate;

molding a surface of the substrate with resin;

heating the substrate and the resin in a first heating process while maintaining the substrate and the resin in a flat condition;

returning the substrate and the resin to room temperature while the substrate and the resin is being maintained in the flat condition after the first heating process;

cutting the resin after returning the substrate and the resin to room temperature from a surface of the resin that is opposite the surface of the resin where the substrate contacts the resin wherein the substrate is left intact; and

separating the substrate.

17. The method for manufacturing a semiconductor device package according to claim 16 , wherein a plurality of cutting plane lines associated with cutting the resin overlaps with at least one of a plurality of cutting plane lines associated with separating the substrate.

18. The method for manufacturing a semiconductor device package according to claim 16 , wherein a cutting plane line associated with separating the substrate includes a cutting plane line associated with cutting the resin.

19. The method for manufacturing a semiconductor device package according to claim 16 , wherein the cutting the resin is in a width direction.

20. The method for manufacturing a semiconductor device package according to claim 16 , wherein the cutting the resin is in a lattice shape.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 041175/0939 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040908/0960 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036050/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2009
From: TANAKA, JUNJI; MEGHRO, KOUICHI; SHINMA, YASUHIRO
To: SPANSION LLC
Reel/Frame 022249/0934 →