Integrated circuit packaging system with package underfill and method of manufacture thereof
View Patent ↗A method of manufacture of an integrated circuit packaging system includes: providing a sacrificial carrier assembly having a stack interconnector thereover; mounting an integrated circuit having a connector over the sacrificial carrier assembly with the connector over the stack interconnector; dispensing an underfill material between the sacrificial carrier assembly and the integrated circuit with the underfill material substantially free of a void; encapsulating the integrated circuit over the sacrificial carrier assembly and the underfill material; exposing the stack interconnector by removing the sacrificial carrier assembly; and forming a base array over the underfill material and the stack interconnector.
1. An integrated circuit packaging system comprising:
a stack interconnector;
an integrated circuit having a connector over the stack interconnector;
a base, having a first side and a second side, attached to the stack interconnector with the first side facing the stack interconnector and including a resistive circuit;
an underfill substantially free of a void between the base and the integrated circuit, the underfill entirely over the first side and including a uniform distribution;
an encapsulation over the integrated circuit, the encapsulation being of a different material than the underfill; and
a system interconnector attached to the second side.
2. The system as claimed in claim 1 wherein the encapsulation surrounds the integrated circuit and the underfill.
3. The system as claimed in claim 1 wherein the encapsulation exposes the underfill.
4. The system as claimed in claim 1 wherein the underfill substantially free of the void between the base and the integrated circuit includes the underfill having at least a portion of the integrated circuit therein.
5. The system as claimed in claim 1 wherein the underfill surrounds the connector.
6. The system as claimed in claim 1 wherein:
the base includes a routing trace between the first side and the second side;
the underfill surrounds the connector; and
the encapsulation is over the first side.
7. The system as claimed in claim 6 wherein:
the underfill includes an underfill non-horizontal side; and
the encapsulation includes an encapsulation non-horizontal side coplanar with the underfill non-horizontal side.
8. The system as claimed in claim 6 wherein the underfill prevents delamination of the integrated circuit.
9. The system as claimed in claim 6 wherein the integrated circuit having the connector over the stack interconnector includes a flip chip over the stack interconnector.