IP Library Granted Patent US 8,531,015
Granted Patent B2
US 8,531,015 · App. 12/412,279 · Granted Sep 10, 2013

Semiconductor device and method of forming a thin wafer without a carrier

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Quick Facts
Patent No.
US 8,531,015
App. No.
12/412,279
Granted
Sep 10, 2013
Kind
B2
Abstract

A semiconductor device has a conductive via in a first surface of a substrate. A first interconnect structure is formed over the first surface of the substrate. A first bump is formed over the first interconnect structure. The first bump is formed over or offset from the conductive via. An encapsulant is deposited over the first bump and first interconnect structure. A portion of the encapsulant is removed to expose the first bump. A portion of a second surface of the substrate is removed to expose the conductive via. The encapsulant provides structural support and eliminates the need for a separate carrier wafer when thinning the substrate. A second interconnect structure is formed over the second surface of the substrate. A second bump is formed over the first bump. A plurality of semiconductor devices can be stacked and electrically connected through the conductive via.

Claims (83)

1. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via in a first surface of the substrate and extending only partially through the substrate;

forming a first interconnect structure over the first surface of the substrate by,

(a) forming a first conductive layer over the first surface of the substrate, and

(b) forming a first insulating layer over the first conductive layer and substrate;

forming a first bump over the first conductive layer;

depositing an encapsulant over the first bump and first interconnect structure;

removing a portion of the encapsulant to expose a portion of the first bump;

forming a second bump over the portion of the first bump exposed through the encapsulant;

removing a portion of a second surface of the substrate, opposite the first surface of the substrate, to expose the conductive via; and

forming a second interconnect structure over the second surface of the substrate and electrically connected to the conductive via.

2. The method of claim 1 , wherein forming the first interconnect structure further includes:

forming a second conductive layer over the first conductive layer and first insulating layer;

forming a second insulating layer over the second conductive layer and first insulating layer; and

forming a third conductive layer over the second conductive layer and second insulating layer.

3. The method of claim 1 , wherein forming the second interconnect structure includes:

forming a second conductive layer over the second surface of the substrate, the second conductive layer electrically connecting to the conductive via;

forming a second insulating layer over the second conductive layer and substrate; and

forming a third conductive layer over the second conductive layer and second insulating layer.

4. The method of claim 1 , wherein the first bump is formed over or offset from the conductive via.

5. The method of claim 1 , further including:

stacking a plurality of the semiconductor devices; and

electrically connecting the semiconductor devices through the conductive via.

6. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via in a first surface of the substrate and partially through the substrate;

forming a first interconnect structure over the first surface of the substrate;

forming a first bump over a surface of the first interconnect structure opposite the substrate;

depositing an encapsulant over the first interconnect structure and the first bump; and

removing a portion of a second surface of the substrate, opposite the first surface of the substrate, to expose the conductive via.

7. The method of claim 6 , further including removing a portion of the encapsulant to expose the first bump.

8. The method of claim 7 , further including forming a second bump over the first bump.

9. The method of claim 7 , wherein the first bump is formed over or offset from the conductive via.

10. The method of claim 6 , further including:

stacking a plurality of the semiconductor devices; and

electrically connecting the semiconductor devices through the conductive via.

11. The method of claim 6 , further including forming the first bump over the conductive via.

12. The method of claim 6 , further including forming a second interconnect structure over the second surface of the substrate.

13. The method of claim 6 , wherein forming the first interconnect structure includes:

forming a first conductive layer over the first surface of the substrate;

forming a first insulating layer over the first conductive layer and substrate;

forming a second conductive layer over the first conductive layer and first insulating layer;

forming a second insulating layer over the second conductive layer and first insulating layer; and

forming a third conductive layer over the second conductive layer and second insulating layer.

14. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via in a first surface of the substrate;

forming a first interconnect structure over the first surface of the substrate;

depositing an encapsulant over the first interconnect structure; and

removing a portion of a second surface of the substrate opposite the first surface of the substrate to expose the conductive via.

15. The method of claim 14 , further including:

forming a first bump over the first interconnect structure; and

removing a portion of the encapsulant to expose the first bump.

16. The method of claim 15 , further including forming a second bump over the first bump.

17. The method of claim 15 , wherein the first bump is formed over or offset from the conductive via.

18. The method of claim 14 , further including:

stacking a plurality of the semiconductor devices; and

electrically connecting the semiconductor devices through the conductive via.

19. A semiconductor device, comprising:

a substrate;

a conductive via formed in a first surface of the substrate with a depth of the conductive via less than a thickness of the substrate;

a first interconnect structure formed over the first surface of the substrate;

a bump formed over the first interconnect structure opposite the substrate; and

an encapsulant deposited over the first interconnect structure and the bump.

20. The semiconductor device of claim 19 , further including a portion of the bump exposed through the encapsulant.

21. The semiconductor device of claim 20 , wherein the bump is formed over or offset from the conductive via.

22. The semiconductor device of claim 19 , further including a second interconnect structure formed over a second surface of the substrate.

23. The semiconductor device of claim 19 , further including a plurality of stacked semiconductor devices electrically connected through the conductive via.

24. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via in a first surface of the substrate and partially through the substrate;

forming a first interconnect structure over the first surface of the substrate; and

removing a portion of a second surface of the substrate opposite the first surface of the substrate to expose the conductive via.

25. The method of claim 24 , further including:

forming a first bump over the first interconnect structure;

depositing an encapsulant over the first interconnect structure; and

removing a portion of the encapsulant to expose the first bump.

26. The method of claim 25 , further including forming a second bump over the first bump.

27. The method of claim 25 , wherein the first bump is formed over or offset from the conductive via.

28. The method of claim 24 , further including:

stacking a plurality of the semiconductor devices; and

electrically connecting the semiconductor devices through the conductive via.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE," TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038401 FRAME: 0532. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0109 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 11, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038401/0532 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2009
From: MARIMUTHU, PANDI C.; HUANG, SHUANGWU; SUTHIWONGSUNTHORN, NATHAPONG
To: STATS CHIPPAC, LTD.
Reel/Frame 022458/0343 →