IP Library Granted Patent US 8,421,201
Granted Patent B2
US 8,421,201 · App. 12/489,122 · Granted Apr 16, 2013

Integrated circuit packaging system with underfill and methods of manufacture thereof

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Quick Facts
Patent No.
US 8,421,201
App. No.
12/489,122
Granted
Apr 16, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a device having a conductor with ends exposed on opposite sides of the device; forming a first surface depression on the device around the conductor; connecting a first component over the conductor and surrounded by the first surface depression; and applying a first underfill between the first component and the device, the first underfill substantially filled within a perimeter of the first surface depression.

Claims (51)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a device formed as a die having a stack side, an active side opposite and facing away from the stack side, and a conductor with an end exposed at the stack side and an opposite end of the conductor exposed at the active side;

forming a first surface depression on the device, the first surface depression surrounding the conductor exposed at the stack side and the active side;

connecting a first component over the conductor and surrounded by the first surface depression; and

applying a first underfill between and in direct contact with the first component and the device, the first underfill substantially filled to a side of an inner edge and within a perimeter of the first surface depression isolated from the conductor; wherein: forming the first surface depression includes an opening within the first surface depression; and further comprising: applying a base underfill within a portion of the opening.

2. The method as claimed in claim 1 further comprising:

providing a second conductor;

forming a second surface depression around the second conductor;

connecting a second component over the second conductor surrounded by the second surface depression; and

applying a second underfill between the second component and the device, the second underfill substantially filling a perimeter of the second surface depression.

3. The method as claimed in claim 1 wherein forming the first surface depression includes forming the first surface depression having a horizontal side and a vertical side.

4. The method as claimed in claim 1 further comprising a base underfill under the first component and covering a portion of the first surface depression.

5. A method of manufacture of an integrated circuit packaging system comprising:

providing a device formed as a die having a stack side, an active side opposite and facing away from the stack side, and a conductor with an end exposed at the stack side and an opposite end of the conductor exposed at the active side;

forming a first surface depression on the device, the first surface depression surrounding the conductor exposed at the stack side and the active side;

connecting a first component over the end of the conductor exposed at the stack side and surrounded by the first surface depression;

applying a first underfill between and in direct contact with the first component and the stack side, the first underfill substantially filled to a side of and within an inner edge and a perimeter of the first surface depression isolated from the conductor;

connecting a package substrate below the device; and

applying a base underfill between the device and the package substrate, the base underfill substantially outside a perimeter of the first surface depression; wherein: forming the first surface depression includes an opening within the first surface depression; and filling the opening with the base underfill.

6. The method as claimed in claim 5 further comprising:

providing a second conductor with ends exposed at opposite sides of the device;

forming a second surface depression next to the first surface depression and around the second conductor;

connecting a second component over the end of the second conductor and surrounded by the second surface depression; and

applying a second underfill between the second component and the stack side.

7. The method as claimed in claim 5 wherein forming the first surface depression includes forming the first surface depression having a horizontal side, a vertical side, and an opening through the horizontal side.

8. The method as claimed in claim 5 wherein applying the base underfill can cover a portion of a horizontal side of the first surface depression.

9. An integrated circuit packaging system comprising:

a device formed as a die having a stack side, an active side opposite and facing away from the stack side, and a conductor with an end exposed at the stack side and an opposite end of the conductor exposed at the active side;

a first surface depression formed on the device, the first surface depression surrounding the conductor exposed at the stack side and the active side;

a first component connected over the conductor surrounded by the first surface depression; and

a first underfill between and in direct contact with the first component and the device, the first underfill substantially filled to an inner edge and within a perimeter of the first surface depression isolated from the conductor; wherein: the first surface depression formed with an opening within the first surface depression; and further comprising: a base underfill applied within a portion of the opening.

10. The system as claimed in claim 9 further comprising:

a second conductor;

a second surface depression formed around the second conductor;

a second component connected over the second conductor surrounded by the second surface depression; and

a second underfill between the second component and the device and a perimeter of the second surface depression substantially filled with the second underfill.

11. The system as claimed in claim 9 wherein the first surface depression formed with a horizontal side and a vertical side.

12. The system as claimed in claim 9 further comprising a base underfill under the first component, the base underfill covers a portion of the first surface depression.

13. The system as claimed in claim 9 wherein:

the first component connected over the end of the conductor at the stack side and surrounded by the first surface depression;

the first underfill between the first component and the stack side; and

further comprising:

a package substrate connected below the device; and

a base underfill between the device and the package substrate and substantially outside a perimeter of the first surface depression.

14. The system as claimed in claim 13 further comprising:

a second conductor with ends at opposite sides of the device;

a second surface depression formed next to the first surface depression and around the second conductor;

a second component connected over the end of the second conductor and surrounded by the second surface depression; and

a second underfill between the second component and the stack side.

15. The system as claimed in claim 13 wherein the first surface depression formed having a horizontal side, a vertical side, and an opening through the horizontal side.

16. The system as claimed in claim 13 wherein the base underfill can cover a portion of a horizontal side of the first surface depression.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0235. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0741 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0235 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2009
From: LEE, KYUNGHOON; YANG, DAEWOOK; KIM, SUNMI
To: STATS CHIPPAC LTD.
Reel/Frame 022927/0876 →