Integrated circuit packaging system with fan-in package and method of manufacture thereof

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a base substrate;

connecting a base component to the base substrate;

mounting a stack component over the base component;

attaching a flattened exposed interconnect directly on the stack component;

flattening an end of the flattened exposed interconnect; and

forming an encapsulant covering the stack component, the encapsulant having a depression, the encapsulant directly on the base substrate and the flattened exposed interconnect, and the flattened end of the flattened exposed interconnect and another of the flattened exposed interconnect both exposed from the encapsulant in the depression in the encapsulant.

2. The method as claimed in claim 1 further comprising connecting a stack package to the flattened exposed interconnect.

3. The method as claimed in claim 1 further comprising connecting an intermediate component to the stack component with the intermediate component between the stack component and the base component.

4. The method as claimed in claim 1 wherein applying the encapsulant includes forming the depression wider at the top in the encapsulant.

5. The method as claimed in claim 1 further comprising:

connecting a central offset device to the base substrate with the central offset device next to the base component; and

connecting a spacer device over the base substrate with the spacer device next to the central offset device.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a base substrate;

connecting a base component directly to the base substrate;

mounting a stack component over the base component;

attaching a flattened exposed interconnect directly on the stack component;

flattening an end of the flattened exposed interconnect; and

forming an encapsulant covering the stack component, the encapsulant having a depression, the encapsulant directly on the base substrate and the flattened exposed interconnect, and the flattened end of the flattened exposed interconnect and another of the flattened exposed interconnect both exposed from the encapsulant in the depression in the encapsulant.

7. The method as claimed in claim 6 further comprising:

forming a lowered surface on the stack component with the lowered surface around the stack component; and

connecting an internal interconnect between the lowered surface and the base substrate.

8. The method as claimed in claim 6 further comprising forming a thermal conductive layer around the base component.

9. The method as claimed in claim 6 further comprising:

forming the stack component with a through opening between the flattened exposed interconnect and an extension of the stack component; and

mounting an intermediate component between the stack component and the base component; and

connecting a feed through connector between the intermediate component and the stack component and having a portion of the feed through connector within the through opening.

10. The method as claimed in claim 6 further comprising connecting a structure support between an extension of the stack component and the base substrate.

11. An integrated circuit packaging system comprising:

a base substrate;

a base component connected to the base substrate;

a stack component over the base component;

a flattened exposed interconnect, having a flattened end, directly on the stack component; and

an encapsulant covering the stack component, the encapsulant having a depression, the encapsulant directly on the base substrate and the flattened exposed interconnect, and the flattened end of the flattened exposed interconnect and another of the flattened exposed interconnect both exposed from the encapsulant in the depression in the encapsulant.

12. The system as claimed in claim 11 further comprising a stack package connected to the flattened exposed interconnect.

13. The system as claimed in claim 11 further comprising an intermediate component connected to the stack component with the intermediate component between the stack component and the base component.

14. The system as claimed in claim 11 wherein the encapsulant includes the depression formed in the encapsulant is wider at the top.

15. The system as claimed in claim 11 further comprising:

a central offset device connected to the base substrate with the central offset device next to the base component; and

a spacer device connected over the base substrate with the spacer device next to the central offset device.

16. The system as claimed in claim 11 wherein the base component is connected directly to the base substrate.

17. The system as claimed in claim 16 further comprising:

a lowered surface formed on the stack component with the lowered surface around the stack component; and

an internal interconnect connected between the lowered surface and the base substrate.

18. The system as claimed in claim 16 further comprising a thermal conductive layer formed around the base component.

19. The system as claimed in claim 16 wherein:

the stack component formed with a through opening between the flattened exposed interconnect and an extension of the stack component; and

further comprising:

an intermediate component mounted between the stack component and the base component; and

a feed through connector connected between the intermediate component and the stack component and having a portion of the feed through connector within the through opening.

20. The system as claimed in claim 16 further comprising a structure support connected between an extension of the stack component and the base substrate.