IP Library Assignment 039428/0928
Patent Assignment
Reel/Frame 039428/0928

Change of Name

Recorded: 2016-07-22 Received: 2016-07-22 Pages: 6
Assignor
STATS CHIPPAC LTD.
Executed: 2016-03-29
Assignee
STATS CHIPPAC PTE. LTD.
10 ANG MO KIO STREET 65, #04-08/09 TECHPOINT, SINGAPORE, SGX, 569059, SINGAPORE
Covered Properties (51)
Integrated Circuit Packaging System with Surface Treatment and Method of Manufacture Thereof
Application: 14/659,905 →
Integrated Circuit Packaging System with Embedded Component and Method of Manufacture Thereof
Application: 14/556,992 →
Integrated Circuit Packaging System with Interposer Structure and Method of Manufacture Thereof
Application: 14/318,061 →
Integrated Circuit Packaging System with Coreless Substrate and Method of Manufacture Thereof
Application: 14/316,461 →
Integrated Circuit Packaging System with Coreless Substrate and Method of Manufacture Thereof
Application: 14/313,452 →
Integrated Circuit Packaging System with Void Prevention Mechanism and Method of Manufacture Thereof
Application: 14/313,521 →
Integrated Circuit Packaging System with Pre-Molded Leadframe and Method of Manufacture Thereof
Application: 14/229,538 →
Coreless Integrated Circuit Packaging System and Method of Manufacture Thereof
Application: 14/214,765 →
Integrated Circuit Packaging System with Pattern-Through-Mold and Method of Manufacture Thereof
Application: 14/156,271 →
Integrated Circuit Packaging System with Under Bump Metallization and Method of Manufacture Thereof
Application: 14/140,829 →
Integrated Circuit Packaging System with Fiber-Less Substrate and Method of Manufacture Thereof
Application: 14/137,755 →
Method of Manufacture of Support System with Fine Pitch
Application: 14/132,539 →
Methods of Mitigating Defects for Semiconductor Packages
Application: 14/039,276 →
Integrated Circuit Through-Substrate via System with a Buffer Layer and Method of Manufacture Thereof
Application: 14/040,413 →
Integrated Circuit System with Debonding Adhesive and Method of Manufacture Thereof
Application: 14/038,275 →
Integrated Circuit Packaging System with Side Solderable Leads and Method of Manufacture Thereof
Application: 14/037,838 →
Integrated Circuit Packaging System with Single Metal Layer Interposer and Method of Manufacture Thereof
Application: 14/037,274 →
Dual-Sided Film-Assist Molding Process
Application: 14/037,320 →
Integrated Circuit Packaging System with Posts and Method of Manufacture Thereof
Application: 13/966,259 →
Leadframe System with Warp Control Mechanism and Method of Manufacture Thereof
Application: 13/949,432 →
Integrated Circuit Packaging System with Trace Protection Layer and Method of Manufacture Thereof
Application: 13/930,319 →
Integrated Circuit Packaging System with Leadframe and Method of Manufacture Thereof
Application: 13/930,261 →
Integrated Circuit Packaging System with Substrate and Method of Manufacture Thereof
Application: 13/842,582 →
Integrated Circuit Packaging System with Package Underfill and Method of Manufacture Thereof
Application: 13/844,160 →
Integrated Circuit Packaging System with Underfill and Method of Manufacture Thereof
Application: 13/842,305 →
Integrated Circuit Having Staggered Bond Pads and I/O Cells
Application: 13/716,479 →
Integrated Circuit Packaging System with Transferable Trace Lead Frame
Application: 13/714,865 →
Integrated Circuit Packaging System with Planarity Control and Method of Manufacture Thereof
Application: 13/526,802 →
Integrated Circuit Packaging System with Interposer and Method of Manufacture Thereof
Application: 13/489,850 →
Integrated Circuit Packaging System with Heatsink Cap and Method of Manufacture Thereof
Application: 13/489,282 →
Integrated Circuit Packaging System with Substrate and Method of Manufacture Thereof
Application: 13/488,812 →
Integrated Circuit Packaging System with External Interconnect and Method of Manufacture Thereof
Application: 13/425,286 →
Integrated Circuit Packaging System with Terminals and Method of Manufacture Thereof
Application: 13/424,968 →
Integrated Circuit Packaging System with Interconnects
Application: 13/407,554 →
Integrated Circuit Packaging System with Terminals and Method of Manufacture Thereof
Application: 13/326,806 →
Integrated Circuit Packaging System with Connection Structure and Method of Manufacture Thereof
Application: 13/298,267 →
Integrated Circuit Packaging System with a Substrate Embedded Dummy-Die Paddle and Method of Manufacture Thereof
Application: 13/242,306 →
Integrated Circuit Packaging System with Redistribution Layer and Method of Manufacture Thereof
Application: 13/221,894 →
Integrated Circuit Packaging System with Island Terminals and Embedded Paddle and Method of Manufacture Thereof
Application: 13/187,505 →
Integrated Circuit Packaging System with Wafer Level Reconfiguration and Method of Manufacture Thereof
Application: 13/167,649 →
Integrated Circuit Packaging System with Exposed Vertical Interconnects and Method of Manufacture Thereof
Application: 13/166,438 →
Integrated Circuit Package Stacking System with Shielding and Method of Manufacture Thereof
Application: 12/716,269 →
Integrated Circuit Packaging System with Fan-in Package and Method of Manufacture Thereof
Application: 12/561,897 →
Integrated Circuit Packaging System with Bumps and Method of Manufacture Thereof
Application: 12/487,925 →
Semiconductor Package System with Cavity Substrate and Manufacturing Method Therefor
Application: 12/260,089 →
Integrated Circuit Package System with Locking Terminal
Application: 12/146,192 →
Semiconductor Package System with Cut Multiple Lead Pads
Application: 12/131,037 →
Stacked Integrated Circuit Package System
Application: 12/056,402 →
Integrated Circuit Package System with Planar Interconnect
Application: 12/055,526 →
Stackable Multi-Chip Package System
Application: 11/754,603 →
Integrated Circuit Package System with Mounting Features for Clearance
Application: 11/694,913 →