IP Library Granted Patent US 9,059,108
Granted Patent B2
US 9,059,108 · App. 13/407,554 · Granted Jun 16, 2015

Integrated circuit packaging system with interconnects

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Quick Facts
Patent No.
US 9,059,108
App. No.
13/407,554
Granted
Jun 16, 2015
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; mounting a base integrated circuit over the base substrate; attaching a lead to the base integrated circuit and the base substrate, the lead having a lead attachment portion over the base integrated circuit; and forming a base encapsulation over the lead, the base encapsulation having a cavity exposing the lead attachment portion.

Claims (24)

1. An integrated circuit packaging system comprising:

a base substrate;

a base integrated circuit over the base substrate;

a lead attached to the base integrated circuit and the base substrate, the lead having a lead attachment portion over the base integrated circuit, a device-lead attach layer is attached to the base integrated circuit and the lead attachment portion; and

a base encapsulation over the lead, the base encapsulation having a cavity exposing top surface of the lead attachment portion and a sidewall of a lead upper portion, wherein the top surface of the exposed lead attachment portion is lower than a top surface of the base encapsulation.

2. The system as claimed in claim 1 wherein the lead includes the lead upper portion and a lead top connection portion downwardly extending from the lead upper portion to the lead attachment portion.

3. The system as claimed in claim 1 wherein the lead is attached to a base inactive side of the base integrated circuit.

4. The system as claimed in claim 1 further comprising:

an internal package paddle;

an internal integrated circuit over the internal package paddle;

an internal encapsulation over the internal integrated circuit and directly on the lead.

5. The system as claimed in claim 1 further comprising an additional base integrated circuit over the base integrated circuit.

6. The system as claimed in claim 1 further comprising a base connector attached to the base integrated circuit and the base substrate.

7. The system as claimed in claim 6 wherein:

the lead includes the lead upper portion and a lead top connection portion downwardly extending from the lead upper portion to the lead attachment portion; and

the base encapsulation includes the cavity partially exposing the lead top connection portion.

8. The system as claimed in claim 6 wherein the lead is attached to a periphery at a base inactive side of the base integrated circuit.

9. The system as claimed in claim 6 further comprising:

an internal package paddle;

an internal integrated circuit over the internal package paddle;

an internal encapsulation over the internal integrated circuit and directly on the lead, a top extent of the internal encapsulation coplanar with a top extent of the lead attachment portion.

10. The system as claimed in claim 6 further comprising:

an additional base integrated circuit over the base integrated circuit; and

an additional base connector directly attached to the additional base integrated circuit and the base substrate.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
RELEASE OF SECURITY INTEREST Recorded Jun 18, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052972/0001 →
CHANGE OF NAME Recorded Jul 22, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 039428/0928 →
SECURITY INTEREST Recorded Nov 20, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 037096/0315 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2012
From: CHOI, DAESIK; CHOI, JOONYOUNG; JEONG, YONGHYUK
To: STATS CHIPPAC LTD.
Reel/Frame 027872/0648 →