Integrated circuit packaging system with encapsulated via and method of manufacture thereof
View Patent ↗A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting an integrated circuit over the substrate; attaching a buffer interconnect to and over the substrate; forming an encapsulation over the substrate covering the buffer interconnect and the integrated circuit; and forming a via in the encapsulation and to the buffer interconnect.
1. A method of manufacture for forming an integrated circuit packaging system comprising:
providing a substrate;
mounting an integrated circuit over the substrate;
attaching a buffer interconnect to and over the substrate;
forming an encapsulation over the substrate covering the buffer interconnect, and the integrated circuit; and
forming a via in the encapsulation and to a recess of the buffer interconnect.
2. The method as claimed in claim 1 further comprising:
mounting an interposer over the encapsulation; and
wherein:
forming the via includes forming the via through the interposer.
3. The method as claimed in claim 1 further comprising:
an interstack module, having an interposer, over the encapsulation; and
wherein:
forming the via includes forming the via through the interposer.
4. The method as claimed in claim 1 further comprising:
attaching the buffer interconnect to and over the integrated circuit; and
wherein forming the via includes forming the via in the encapsulation and to the buffer interconnect attached to the integrated circuit.
5. The method as claimed in claim 1 further comprising:
providing an interposer over the substrate; and
wherein:
forming the encapsulation includes pre-attaching the encapsulation to the interposer; and
forming the via includes forming the via through the interposer.
6. A method of manufacture for forming an integrated circuit packaging system comprising:
providing an substrate having an substrate first side and an substrate second side;
mounting an integrated circuit over the substrate first side;
attaching a buffer interconnect along the peripheral portion of the substrate first side;
forming an encapsulation over the substrate first side and covering the buffer interconnect and the integrated circuit; and
forming a via through the encapsulation to a recess of the buffer interconnect with a top portion of the via coplanar with an encapsulation top side of the encapsulation.
7. The method as claimed in claim 6 further comprising mounting a mountable structure over the encapsulation with the mountable structure connected to the via.
8. The method as claimed in claim 6 further comprising:
mounting the substrate second side over a base structure; and
mounting a mountable structure over the encapsulation with the mountable structure connected to the via.
9. The method as claimed in claim 6 further comprising mounting an external interconnect to the substrate second side.
10. The method as claimed in claim 6 wherein mounting the integrated circuit includes mounting a flip chip.
11. An integrated circuit packaging system comprising:
a substrate;
an integrated circuit over the substrate;
a buffer interconnect attached to and over the substrate;
a via directly attached to the buffer interconnect in a recess of the buffer interconnect; and
an encapsulation over the substrate covering the via, the buffer interconnect, and the integrated circuit, with a top portion of the via exposed.
12. The system as claimed in claim 11 further comprising:
an interposer over the encapsulation; and
wherein:
the via is through the interposer.
13. The system as claimed in claim 11 further comprising:
an interstack module, having an interposer, over the encapsulation; and
wherein:
the via is through the interposer.
14. The system as claimed in claim 11 wherein the buffer interconnect is attached to and over the integrated circuit.
15. The system as claimed in claim 11 wherein a top portion of the via is coplanar with an encapsulation top side of the encapsulation.
16. The system as claimed in claim 11 wherein:
the substrate includes a substrate first side and a substrate second side;
the buffer interconnect is attached along the peripheral portion of the substrate first side; and
the via includes a top portion coplanar with an encapsulation top side.
17. The system as claimed in claim 16 further comprising a mountable structure mounted over the encapsulation with the mountable structure connected to the via.
18. The system as claimed in claim 16 further comprising:
a base structure under the substrate second side; and
a mountable structure mounted over the encapsulation with the mountable structure connected to the via.
19. The system as claimed in claim 16 further comprising an external interconnect mounted to the substrate second side.
20. The system as claimed in claim 16 wherein the integrated circuit includes a flip chip.