IP Library Granted Patent US 8,437,427
Granted Patent B2
US 8,437,427 · App. 12/569,290 · Granted May 7, 2013

Arbitrary frequency shifter in communication systems

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Quick Facts
Patent No.
US 8,437,427
App. No.
12/569,290
Granted
May 7, 2013
Kind
B2
Abstract

This invention describes a programmable, digital implementation to shift an arbitrary frequency, or various frequencies in various communication systems of the original signal in the frequency domain. The correspondent phase accumulation to perform the desired frequency shift per sampling instant is perfectly tracked by counting up or down a simple integer. Several arbitrary frequency shifters with different mathematical models are provided. The correspondent implementations with Look-Up-Tables (LUT) are derived for high-speed implementations without further calculations of the values of the sine and cosine functions every sampling instant. Furthermore, a simple shift-and-add phase rotation is described to replace the four required real multiplications. If the original complex signal contains only one-bit each from real part and imaginary part, a surprisingly simple implementation is derived and disclosed for the overall arbitrary frequency shift operation. Further simplifications are also disclosed to make this invention feasible for high sampling frequencies and small frequency drifts.

Claims (1533)

1. A frequency shifter for shifting an arbitrary frequency of an input signal in an arbitrary wireless communication system, comprising:

a positive or negative frequency shift controller, used to provide a 1-bit controller PN which controls sign indicators S 1 and S 2 ;

a counting up or down counter, receiving a phase increment per sampling instant and the sign indicator S 1 , used to output an integer reference time index, ñ, which is equivalent to a tracking of an accumulated phase increment θ n corresponding to a required phase shift to an arbitrary frequency shift, ±f Δ of the input signal at time instant t=n, wherein f Δ , is a positive number;

a cosine function Look-Up-Table (LUT) T 1 and a sine function LUT, T 2 , receiving the reference time index, ñ, used to provide sine and cosine values; and

a phase shifter, receiving the sine and cosine values from the sine and cosine function LUTs and the sign indicators S 2 , used to output a complex signal, Ĩ n +j{tilde over (Q)} n , with a frequency shift of the input signal, I n +jQ n ;

wherein a mathematical relationship between the input and output of the phase shifter is described as follows:

Ĩ n =I n ×T 1 [ñ]−Q n ×S 2 ×T 2 [ñ]

{tilde over (Q)} n =Q n ×T 1 [ñ]+I n ×S 2 ×T 2 [ñ],

wherein a sampling rate of the frequency shifter is denoted as a positive number, f s , and a ratio

2

f

Δ

f

s

,

is a rational number defined in the following mathematical equation:

(

2

f

Δ

f

s

)

=

F

M

=

N

(

2

M

)

+

K

M

=

2

N

+

K

M

wherein

N

=

F

2

M

,

0≦K<2M, M≠0, F, M, N and K are non-negative integers; and a notation, └x┘, is the largest integer which is equal to or smaller than a positive value x.

2. The frequency shifter as claimed in claim 1 , wherein a relationship between the 1-bit controller PN and sign indicators, S 2 and S 1 , is defined as follows:

1-2 ×PN=S 2 ×S 1 ;

if the arbitrary frequency shift is a positive number, +f Δ , then PN=0 and (S 1 , S 2 )=(1, 1) or (−1,−1);

and if the arbitrary frequency shift is a negative number, −f Δ , then PN=1 and (S 1 , S 2 )=(1, −1) or (−1, 1).

3. The frequency shifter as claimed in claim 1 , wherein the reference time index, ñ, is obtained with a modulo 2M operation which is equivalent to a modulo 2Kπ operation of the accumulated phase increment, θ n , which is correspondent to the required phase shift.

4. A frequency shifter for shifting an arbitrary frequency of an input signal in an arbitrary wireless communication system, comprising:

a positive or negative frequency shift controller, used to provide a 1-bit controller PN which controls sign indicators S 1 and S 2 ;

a counting up or down counter, receiving a phase increment per sampling instant and the sign indicator S 1 , used to output an integer reference time index, ñ, which is equivalent to a tracking of an accumulated phase increment θ n corresponding to a required phase shift to an arbitrary frequency shift, ±f Δ of the input signal at time instant t=n, wherein f Δ , is a positive number;

a cosine function Look-Up-Table (LUT) T 1 and a sine function LUT T 2 , receiving the reference time index, ñ, used to provide sine and cosine values; and

a phase shifter, receiving the sine and cosine values from the sine and cosine function LUTs and the sign indicators S 2 , used to output a complex signal, Ĩ n +j{tilde over (Q)} n , with a frequency shift of the input signal, I n +jQ n ;

wherein the mathematical relationship between the input and output of the phase shifter is described as follows:

Ĩ n =I n ×T 1 [ñ]−Q n ×S 2 ×T 2 [ñ]

{tilde over (Q)} n =Q n ×T 1 [ñ]+I n ×S 2 ×T 2 [ñ];

wherein the reference time index, ñ, is described as follows:

n

~

|

t

=

n

=

{

n

~

|

t

=

n

-

1

+

S

1

-

2

M

,

if

n

~

|

t

=

n

-

1

+

S

1

2

M

n

~

|

t

=

n

-

1

+

S

1

+

2

M

,

if

n

~

|

t

=

n

-

1

+

S

1

<

0

n

~

|

t

=

n

-

1

+

S

1

,

otherwise

.

wherein ñ| t=n the reference time index at t=n and ñ| t=n−1 is the reference time index at t=n−1; S 1 =1 or −1 is defined as follows:

1-2 ×PN=S 2 ×S 1 ;

if the arbitrary frequency shift is a positive number, +f Δ , then PN=0 and (S 1 , S 2 )=(1, 1) or (−1,−1);

and if the arbitrary frequency shift is a negative number, −f Δ , then PN=1 and (S 1 , S 2 )=(1, −1) or (−1, 1),

K, M are defined as follows:

M≠0, F, M are non-negative integers, and the reference time index is a non-negative integer from 0 to 2M−1.

5. The frequency shifter as claimed in claim 1 , wherein the sine and cosine function LUTs are:

T

1

[

m

]

=

cos

(

m

K

π

M

)

and

T

2

[

m

]

=

sin

(

m

K

π

M

)

,

0

m

2

M

-

1

where the size of the sine and cosine function LUT is 2M each and therefore 4M in total.

6. The frequency shifter as claimed in claim 4 , wherein a relationship between the 1-bit controller PN and sign indicators, S 2 and S 1 , is defined as follows:

1-2 ×PN=S 2 ×S 1 ;

if the arbitrary frequency shift is a positive number, +f Δ , then PN=0 and (S 1 , S 2 )=(1, 1) or (−1,−1);

and if the arbitrary frequency shift is a negative number, −f Δ , then PN=1 and (S 1 , S 2 )=(1, −1) or (−1, 1).

7. The frequency shifter as claimed in claim 4 , wherein the reference time index, ñ, is obtained with a modulo 2M operation which is equivalent to a modulo 2Kπ operation of the accumulated phase increment, θ n , which is correspondent to the required phase shift.

8. A frequency shifter for shifting an arbitrary frequency of an input signal in an arbitrary wireless communication system, comprising:

a positive or negative frequency shift controller, used to provide a 1-bit controller PN which controls sign indicators S 1 and S 2 ;

a counting up or down counter, receiving a phase increment per sampling instant and the sign indicator S 1 , used to output an integer reference time index, ñ, which is equivalent to a tracking of an accumulated phase increment θ n corresponding to a required phase shift to an arbitrary frequency shift, ±f Δ of the input signal at time instant t=n, wherein f Δ , is a positive number;

a sine and cosine index and sign calculator, receiving the reference time index ñ, used to calculate an index of sine function n s , an index of cosine function n c , a sign of sine function S sin , and a sign of cosine function, S cos ;

a sine function Look-Up-Table (LUT) T 3 , receiving the indexes n s and n c , used to output corresponding values T 3 [n s ], T 3 [n c ] from the LUT; and

a phase shifter, receiving the sine and cosine values from the sine and cosine function LUTs and the sign indicators S 2 , used to output a complex signal, Ĩ n +j{tilde over (Q)} n , with a frequency shift of the input signal, I n +jQ n ;

wherein a mathematical relationship between the input and output of the phase shifter is described as follows:

Ĩ n =I n ×S cos ×T 3 [n c ]−Q n ×S 2 ×S sin ×T 3 [n s ]

{tilde over (Q)} n =Q n ×S cos ×T 3 [n c ]+I n ×S 2 ×S sin ×T 3 [n s ];

wherein the relation between a the 1-bit controller PN and sign indicators, S 2 and S 1 , is defined as follows:

1-2 ×PN=S 2 ×S 1 ;

if the arbitrary frequency shift is a positive number, +f Δ , then PN=0 and S 2 =S 1 =1 or S 2 =S 1 =−1;

if the arbitrary frequency shift is a negative number, −f Δ , then PN=1 and S 2 =−S 1 =1 or S 2 =−S 1 =−1.

9. The frequency shifter as claimed in claim 8 , wherein the reference time index, ñ, is obtained with a modulo 2×R×M operation which is equivalent to a modulo 2π operation of the accumulated phase increment, θ n , which is correspondent to the required phase shift.

10. The frequency shifter as claimed in claim 8 , wherein the sine function LUT is defined as follows:

T

3

[

m

]

=

sin

[

m

π

2

M

]

,

m=0, 1, 2, 3, . . . , M; and the size of the sine function LUT is M+1.

11. A frequency shifter for shifting an arbitrary frequency of an input signal in an arbitrary wireless communication system, comprising:

a positive or negative frequency shift controller, used to provide a 1-bit controller PN which controls sign indicators S 1 and S 2 ;

a counting up or down counter, receiving a phase increment per sampling instant and the sign indicator S 1 , used to output an integer reference time index, ñ, which is equivalent to a tracking of an accumulated phase increment θ n corresponding to a required phase shift to an arbitrary frequency shift, ±f Δ of the input signal at time instant t=n, wherein f Δ , is a positive number;

a sine and cosine index and sign calculator, receiving the reference time index ñ, used to calculate an index of sine function n s , an index of cosine function n c , a sign of sine function S sin , and a sign of cosine function, S cos ;

a sine function Look-Up-Table (LUT) T 3 , receiving the indexes n s and n c , used to output corresponding values T 3 [n s ], T 3 [n c ] from the LUT; and

a phase shifter, receiving the sine and cosine values from the sine and cosine function LUTs and the sign indicators S 2 , used to output a complex signal, Ĩ n +j{tilde over (Q)} n , with a frequency shift of the input signal, I n +jQ n ;

wherein a mathematical relationship between the input and output of the phase shifter is described as follows:

Ĩ n =I n ×S cos ×T 3 [n c ]−Q n ×S 2 ×S sin ×T 3 [n s ]

{tilde over (Q)} n =Q n ×S cos ×T 3 [n c ]+I n ×S 2 ×S sin ×T 3 [n s ];

wherein a sampling rate of the frequency shifter is denoted as a positive real number, f s , and a ratio

2

f

Δ

f

s

,

is a rational number defined in the following mathematical equation:

(

2

f

Δ

f

s

)

=

F

R

×

M

=

N

(

2

R

×

M

)

+

K

R

×

M

=

2

N

+

K

R

×

M

wherein

N

=

F

2

RM

,

0≦K<2RM, M≠0, R=1 or 2, F, M N, K, and ñ are non-negative integers; and

a notation, └x┘, is the largest integer which is equal to or smaller than a positive value x.

12. The frequency shifter as claimed in claim 11 , wherein the reference time index, ñ is described as follows:

n

~

|

t

=

n

=

{

n

~

|

t

=

n

-

1

+

S

1

×

K

-

2

RM

,

if

n

~

|

t

=

n

-

1

+

S

1

×

K

2

RM

n

~

|

t

=

n

-

1

+

S

1

×

K

+

2

RM

,

if

n

~

|

t

=

n

-

1

+

S

1

×

K

<

0

n

~

|

t

=

n

-

1

+

S

1

×

K

,

otherwise

wherein ñ| t=n is the reference time index at t=n and ñ| t=n−1 is the reference time index at t=n−1, S 1 =1 or S 1 =−1 is defined as follows:

1-2 ×PN=S 2 ×S 1 ;

if the arbitrary frequency shift is a positive number, +f Δ , then PN=0 and S 2 =S 1 =1 or S 2 =S 1 =−1;

if the arbitrary frequency shift is a negative number, −f Δ , then PN=1 and S 2 =−S 1 =1 or S 2 =−S 1 =−1,

K, R, M are defined in claim 11 , and the reference time index is a non-negative integer from 0 to 2RM-1.

13. The frequency shifter as claimed in claim 12 , wherein a mathematical relationship between the input and outputs of the sine and cosine index and sign calculator is described as follows:

(

a

)

0

n

~

<

RM

2

S

cos

=

+

1

,

S

sin

=

+

1

,

n

c

=

M

-

2

R

n

~

;

n

s

=

2

R

n

~

(

b

)

RM

2

n

~

<

2

RM

2

S

cos

=

-

1

,

S

sin

=

+

1

,

n

c

=

2

R

n

~

-

M

;

n

s

=

2

M

-

2

R

n

~

(

c

)

2

RM

2

n

~

<

3

RM

2

S

cos

=

-

1

,

S

sin

=

-

1

,

n

c

=

3

M

=

2

R

n

~

;

n

s

=

2

R

n

~

-

2

M

(

d

)

3

RM

2

n

~

<

4

RM

2

S

cos

=

+

1

,

S

sin

=

-

1

,

n

c

=

2

R

n

~

-

3

M

;

n

s

=

4

M

-

2

R

n

~

;

wherein, the reference time index, ñ, is defined in claim 12 as a non-negative integer between 0 and 2×R×M−1, R=1 or 2, M is an integer defined in claim 11 , and n c , n s are non-negative integers from 0 to M.

14. The frequency shifter as claimed in claim 11 , wherein two values from sine LUT, T 3 [n c ] and T 3 [n s ], can be approximated from a smaller size LUT, T 7 , with two new integer indexes which are derived from sizes of LUTs T 3 and T 7 , representing the closest indexes of a new LUT, T 7 , which have the closest LUT value to the original ones, wherein the mathematical relationship between T 3 and T 7 is defined as follows:

T 3 [n]≈T 7 [{circumflex over (n)}],

where the index h is described as follows:

n

^

=

{

n

M

1

M

;

if

(

n

M

1

M

)

-

n

M

1

M

0.5

n

M

1

M

+

1

;

otherwise

;

and

the LUT T 7 is defined as follows:

T

7

[

m

]

=

sin

[

m

π

2

M

1

]

,

m

=

0

,

1

,

2

,

3

,

,

M

1

,

wherein integer 0<M 1 ≦M, M is defined in claim 11 , and the size of the sine function LUT is M 1 +1.

15. The frequency shifter as claimed in claim 14 , wherein the two values from sine LUT, T 3 [n c ] and T 3 [n s ], can be approximated from a linear interpolation of two nearest LUT values from T 7 , in claim 14 , as follows:

T

3

[

n

]

(

n

M

1

M

+

1

-

n

M

1

M

)

×

T

7

[

n

M

1

M

]

+

(

n

M

1

M

-

n

M

1

M

)

×

T

7

[

n

M

1

M

+

1

]

wherein index n=n c or n s , integer M 1 is the size of the new LUT defined in claim 14 , and integer M is defined in claim 11 .

16. The frequency shifter as claimed in claim 11 , wherein the reference time index, {circumflex over (n)}, is obtained with a modulo 2×R×M operation which is equivalent to a modulo 2π operation of the accumulated phase increment, θ n , which is correspondent to the required phase shift.

17. The frequency shifter as claimed in claim 11 , wherein the sine function LUT is defined as follows:

T

3

[

m

]

=

sin

[

m

π

2

M

]

,

m

=

0

,

1

,

2

,

3

,

,

M

;

and size of the sine function LUT is M+1.

18. A frequency shifter for shifting an arbitrary frequency of an input signal in an arbitrary wireless communication system, comprising:

a positive or negative frequency shift controller, used to provide a 1-bit controller PN which controls a sign indicators S 1 ;

a counting up or down counter, receiving a phase increment per sampling instant and the sign indicator S 1 , used to output an integer reference time index, ñ, which is equivalent to a tracking of an accumulated phase increment θ n corresponding to a required phase shift to an arbitrary frequency shift, ±f Δ of the input signal at time instant t=n, wherein f Δ , is a positive number;

a phase mapping block, receiving a input complex signal, I n +jQ n , used to output a parameter, α n , indicating a phase of input complex signal;

a sine and cosine index and sign calculator, receiving a modified reference time index, {tilde over (ñ)}, used to calculate an index of sine function n s , an index of cosine function n c , a sign of sine function S sin , and a sign of cosine function, S cos ;

a sine function Look-Up-Table (LUT) T 4 , receiving the indexes n s and n c and the signs, S cos and S sin , used to output corresponding values T 4 [n s ], T 4 [n c ] from the LUT, and calculate a complex signal, Ĩ n +j{tilde over (Q)} n , with a frequency shift of the input signal, I n +jQ n ;

wherein the modified reference time index, {tilde over (ñ)}, is calculated from the reference time index, ñ, design parameters, R=1, M≠0, and α n ; and an output of the phase shifter is described as follows:

Ĩ n =S cos T 4 [n c ]

{tilde over (Q)} n =S sin T 4 [n s ].

19. The frequency shifter as claimed in claim 18 , wherein the complex input signal, I n +jQ n , is a pair of 1-bit digital signal at time instant t=n, I n or Q n , is 0 or 1;

where 0 or 1 represents a fixed arbitrary number either positive or negative, +A or −A, where A is a fixed, arbitrary positive number.

20. The frequency shifter as claimed in claim 18 , wherein the phase mapping block receives the complex signal, I n +jQ n and outputs a parameter, α n , according to the following equation:

α

n

=

{

0

;

if

I

n

=

+

A

,

Q

n

=

+

A

1

;

if

I

n

=

-

A

,

Q

n

=

+

A

2

;

if

I

n

=

-

A

,

Q

n

=

-

A

3

;

if

I

n

=

+

A

,

Q

n

=

-

A

where A is an arbitrary positive number.

21. The frequency shifter as claimed in claim 18 , wherein the relation between the 1-bit controller PN and the sign indicator, S 1 , is defined as follows:

1-2 ×PN=S 1 ;

if the arbitrary frequency shift is a positive number, +f Δ , then PN=0 and S 1 =1; and

if the arbitrary frequency shift is a negative number, −f Δ , then PN=1 and S 1 =−1.

22. The frequency shifter as claimed in claim 18 , wherein a sampling rate of the frequency shifter is a positive real number denoted as f s , and a ratio

2

f

Δ

f

s

,

is a rational number defined in the following mathematical equation:

(

2

f

Δ

f

s

)

=

F

R

×

M

=

N

(

2

R

×

M

)

+

K

R

×

M

=

2

N

+

K

R

×

M

wherein

N

=

F

2

RM

,

0≦K<2RM, M≠0, R=1 or 2, F, M, N, K, and ñ are non-negative integers; and

a notation, └x┘, represents the largest integer which is equal to or smaller than a positive value x.

23. The frequency shifter as claimed in claim 22 , wherein the sine function LUT is defined as follows:

T

4

[

l

]

=

sin

[

l

π

2

M

+

p

π

4

M

]

l

=

0

,

1

,

2

,

3

,

,

M

where integer M is defined in claim 22 and integer p=0, 1,

m

=

M

2

is an arbitrary non-negative inter, and size of the sine function LUT is M+1.

24. The frequency shifter as claimed in claim 22 , wherein the two values from sine and cosine LUT, T 4 [n c ] and T 4 [n s ], can be approximated from a smaller size LUT, T 8 , with two new integer indexes which are derived from sizes of LUTs T 4 and T 8 , representing closest indexes of the new LUT which have the closest LUT value to the original ones, wherein the mathematical relationship between T 4 and T 8 is defined as follows:

T 4 [n]≈T 8 [{circumflex over (n)}],

where {circumflex over (n)} is

n

^

=

{

n

M

1

M

;

if

(

n

M

1

M

)

-

n

M

1

M

0.5

n

M

1

M

+

1

;

otherwise

;

and

the new LUT T 8 is defined as follows:

T

8

[

m

]

=

sin

[

m

π

2

M

1

+

p

π

4

M

]

,

m

=

0

,

1

,

2

,

3

,

,

M

1

wherein integer 0<M 1 ≦M, integer M is defined in claim 22 , integer p=0 or 1, and size of the sine function LUT is M 1 +1.

25. The frequency shifter as claimed in claim 24 , wherein the two values from sine and cosine LUT, T 4 [n c ] and T 4 [n s ], can be approximated from a linear interpolation of two values from the LUT, T 8 , in claim 26 as follows:

T

4

[

n

]

(

n

M

1

M

+

1

-

n

M

1

M

)

×

T

8

[

n

M

1

M

]

+

(

n

M

1

M

-

n

M

1

M

)

×

T

8

[

n

M

1

M

+

1

]

wherein index n=n c or n s , integer M 1 is defined in claim 26 , and integer M is defined in claim 22 .

26. The frequency shifter as claimed in claim 24 , wherein the LUT T 8 can be replaced with another LUT as follows:

T

8

[

m

]

=

sin

[

m

π

2

M

1

+

p

π

4

M

1

]

,

m

=

0

,

1

,

2

,

3

,

,

M

1

where integers p, M 1 , and M have the same definitions in claim 24 .

27. The frequency shifter as claimed in claim 18 , wherein the reference time index, ñ, is obtained with a modulo 2×R×M operation which is equivalent to a modulo 2π operation of the accumulated phase increment, θ n , which is correspondent to the required phase shift.

28. The frequency shifter as claimed in claim 22 , wherein the reference time index, ñ is described as follows:

n

~

|

t

=

n

=

{

n

~

|

t

=

n

-

1

+

S

1

×

K

-

2

RM

,

if

n

~

|

t

=

n

-

1

+

S

1

×

K

2

RM

n

~

|

t

=

n

-

1

+

S

1

×

K

+

2

RM

,

if

n

~

|

t

=

n

-

1

+

S

1

×

K

<

0

n

~

|

t

=

n

-

1

+

S

1

×

K

,

otherwise

wherein ñ| t=n is a reference time index at t=n and ñ| t=n−1 is a reference time index at t=n−1, S 1 =1 or S 1 =−1 is defined as follows:

1-2 ×PN=S 1 ;

if the arbitrary frequency shift is a positive number, +f Δ , then PN=0 and S 1 =1; and

if the arbitrary frequency shift is a negative number, −f Δ , then PN=1 and S 1 =−1,

K, R, M are defined in claim 22 , and the reference time index is a non-negative integer from 0 to 2RM−1.

29. The frequency shifter as claimed in claim 28 , wherein the modified reference time index, {tilde over (ñ)}, is calculated as follows:

n

~

~

{

2

R

n

~

+

m

+

M

α

n

-

4

M

,

if

2

R

n

~

+

m

+

M

α

n

4

M

2

R

n

~

+

m

+

M

α

n

+

4

M

,

if

2

R

n

~

+

m

+

M

α

n

<

0

2

R

n

~

+

m

+

M

α

n

,

otherwise

.

where integer M=2m+p defined in claim 22 , p=0, 1,

m

=

M

2

is an arbitrary non-negative integer, α n is defined according to the following equation:

α

n

=

{

0

;

if

I

n

=

+

A

,

Q

n

=

+

A

1

;

if

I

n

=

-

A

,

Q

n

=

+

A

2

;

if

I

n

=

-

A

,

Q

n

=

-

A

3

;

if

I

n

=

+

A

,

Q

n

=

-

A

where A is an arbitrary positive number,

R is defined in claim 22 , the reference time index ñ is defined in claim 28 , and the modified reference time index is a non-negative integer from 0 to 4M−1.

30. The frequency shifter as claimed in claim 29 , wherein a mathematical relationship between the input and outputs of the sine and cosine index and sign calculator is described as follows:

( a ) 0 ≦{tilde over (ñ)}<M S cos =+1 ,S sin =+1 ,n c =M−{tilde over (ñ)}−p;n s ={tilde over (ñ)};

( b ) M≦{tilde over (ñ)}< 2 M S cos =−1 ,S sin =+1 ,n c ={tilde over (ñ)}−M;n s =2 M−{tilde over (ñ)}−p;

( c ) 2 M≦{tilde over (ñ)}< 3 M S cos =−1 ,S sin =−1 ,n c =3 M−{tilde over (ñ)}−p;n s ={tilde over (ñ)}− 2 M;

( d ) 3 M≦{tilde over (ñ)}< 4 M S cos =+1 ,S sin =−1 ,n c ={tilde over (ñ)}− 3 M;n s =4 M−{tilde over (ñ)}−p;

wherein the modified reference time index, {tilde over (ñ)}, defined in claim 29 is a non-negative integer between 0 and 4M−1, R=1 or 2, integer M is defined in claim 22 , integer p=0, 1,

m

=

M

2

is an arbitrary non-negative inter, and n c , n s are non-negative integers from 0 to M.

Assignments (17)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2015
From: MICROCHIP TECHNOLOGY (BARBADOS) II INCORPORATED
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 036631/0555 →
MERGER Recorded Sep 6, 2015
From: ISSC TECHNOLOGIES CORP.
To: MICROCHIP TECHNOLOGY (BARBADOS) II INCORPORATED
Reel/Frame 036562/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2009
From: CHEN, JENG-HONG
To: INTEGRATED SYSTEM SOLUTION CORP.
Reel/Frame 023318/0899 →