Integrated circuit package with open substrate

1. A method of manufacturing an integrated circuit package comprising:

forming a substrate including:

forming a core layer, and

forming vias in the core layer;

forming a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias;

forming connections between an integrated circuit die and the conductive layer; and

forming a solder mask over the core layer having openings therein to the conductive layer.

2. The method as claimed in claim 1 wherein:

forming the solder mask includes forming the solder mask to extend into the vias.

3. The method as claimed in claim 1 further comprising:

forming terminals on the conductive layer of the predetermined thickness in the vias, the terminals having a shape of at least one of square, rectangular, and round; and

forming a further solder mask over the core layer having openings therein to the terminals.

4. The method as claimed in claim 1 further comprising:

forming terminals on the conductive layer of the predetermined thickness in the vias;

forming a further solder mask over the core layer having openings therein to the terminals; and

forming solder balls connected to the terminals through the further solder mask.

5. The method as claimed in claim 1 further comprising:

forming solder balls through the solder mask on the conductive layer on the core layer; and

forming the substrate includes forming an opening through the substrate.

6. An integrated circuit package comprising:

a substrate including a core layer having vias provided therein;

a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias;

an integrated circuit over the substrate;

connections between the integrated circuit die and the conductive layer; and

a solder mask formed over the core layer having openings therein to the conductive layer.

7. The package as claimed in claim 6 further comprising:

an encapsulant encapsulating the integrated circuit die with the encapsulant extending into the vias.

8. The package as claimed in claim 6 further comprising:

terminals on the conductive layer of the predetermined thickness in the vias, the terminals having a shape of at least one of square, rectangular, and round.

9. The package as claimed in claim 6 further comprising:

terminals on the conductive layer of the predetermined thickness in the vias; and

solder balls connected to the terminals.

10. The package as claimed in claim 6 further comprising:

solder balls on the conductive layer on the core layer.

11. The package as claimed in claim 6 wherein:

the solder mask extends into the vias.

12. The package as claimed in claim 6 further comprising:

terminals on the conductive layer of the predetermined thickness in the vias, the terminals having a shape of at least one of square, rectangular, and round; and

a further solder mask over the core layer having openings therein to the terminals.

13. The package as claimed in claim 6 further comprising:

terminals on the conductive layer of the predetermined thickness in the vias;

a further solder mask over the core layer having openings therein to the terminals; and

solder balls connected to the terminals through the further solder mask.

14. The package as claimed in claim 6 further comprising:

solder balls through the solder mask on the conductive layer on the core layer; and

the substrate having an opening therethrough.