Patent Assignment
Reel/Frame 064806/0593
Corrective Assignment to Correct the Assignee's Name Previously Recorded at Reel: 038378 Frame: 0400. Assignor(S) Hereby Confirms the Assignment.
Recorded: 2023-09-05
Pages: 13
Assignor
STATS CHIPPAC LTD.
Executed: 2016-03-29
Assignee
STATS CHIPPAC PTE. LTD.
5 YISHUN STREET 23, WASHINGTON, DISTRICT OF COLUMBIA, 20006
Covered Properties
(81)
Flip Chip Molded/Exposed Die Process and Package Structure
Patent:
6,660,565 →
Application:
09/640,534 →
Ground Land for Singulated Ball Grid Array
Patent:
6,597,188 →
Application:
09/658,890 →
Single Unit Automated Assembly of Flex Enhanced Ball Grid Array Packages
Patent:
6,544,812 →
Application:
09/706,220 →
Process and Support Carrier for Flexible Substrates
Method and Apparatus for Establishing Quick and Reliable Connection Between a Semiconductor Device Handler Plate and a Semiconductor Device Test Head Plate
Plastic Ball Grid Array Package with Integral Heatsink
Pbga Substrate for Anchoring Heat Sink
Molded Stiffener for Flexible Circuit Molding
Heat Spreader Anchoring & Grounding Method & Thermally Enhanced Pbga Package Using the Same
Ground Plane for Exposed Package
Heat Spreader Hole Pin 1 Identifier
Heat Spreader Interconnect Methodology for Thermally Enhanced Pbga Packages
Testing of Bga and Other Csp Packages Using Probing Techniques
A Method of Forming a Small Pitch Torch Bump for Mounting High-Performance Flip-Flop Devices
Test Coupon Pattern Design to Control Multilayer Saw Singulated Plastic Ball Grid Array Substrate Mis-Registration
Method of Trimming and Singulating Leaded Semiconductor Packages
Integrated Circuit Package and Manufacturing Method Therefor
Leadframe for Die Stacking Applications and Related Die Stacking Concepts
Cost Effective Substrate Fabrication for Flip-Chip Packages
Mold Cap Anchoring Method for Molded Flex Bga Packages
Enhanced Bga Grounded Heatsink
Super Thin/Super Thermal Ball Grid Array Package
Thermally Enhanced Stacked Die Package
Patent:
6,627,990 →
Application:
10/359,407 →
Single Unit Automated Assembly of Flex Enhanced Ball Grid Array Packages
Heat Spreaders, Heat Spreader Packages, and Fabrication Methods for Use with Flip Chip Semiconductor Devices
Integrated Circuit Leadframe with Ground Plane
Moisture Resistant Integrated Circuit Leadframe Package
Ground Plane for Exposed Package
Semiconductor Package with Heat Sink
Method of Manufacturing a Semiconductor Package for a Die Larger Than a Die Pad
Stacked Semiconductor Packages and Method for the Fabrication Thereof
Semiconductor Stacked Multi-Package Module Having Inverted Second Package
Semiconductor Multi-Package Module Having Inverted Land Grid Array (Lga) Package Stacked Over Ball Grid Array (Bga) Package
Method for Fabricating Semiconductor Packages, and Leadframe Assemblies for the Fabrication Thereof
Patent:
6,858,470 →
Application:
10/682,273 →
Flip Chip Molded/Exposed Die Process and Package Structure
Multi-Package Conversion Kit for a Pick and Place Handler
Heat Spreader Interconnect for Thermally Enhanced Pbga Packages
Strip-Fabricated Flip Chip in Package and Flip Chip in System Heat Spreader Assemblies and Fabrication Methods Therefor
Semiconductor Package with Passive Device Integration
Heat Spreader Anchoring and Grounding Method and Thermally Enhanced Pbga Package Using the Same
System for Fabricating an Integrated Circuit Package on a Printed Circuit Board
Heat Spreader for Thermally Enhanced Semiconductor Package
Large Die Package Structures and Fabrication Method Therefor
Dual Row Leadframe and Fabrication Method
Method of Manufacturing Different Bond Pads on the Same Substrate of an Integrated Circuit Package
Integrated Circuit Package with Leadframe Locked Encapsulation and Method of Manufacture Therefor
Packaging for Optoelectronic Devices
Chip Scale Package with Open Substrate
Integrated Circuit Die with Pedestal
Method and Apparatus for Stacked Die Packaging
Semiconductor Device Package
Array-Molded Package Heat Spreader and Fabrication Method Therefor
Integrated Circuit Package
Stacked Semiconductor Packages
Semiconductor Packages and Leadframe Assemblies
Semiconductor Multipackage Module Including Die and Inverted Land Grid Array Package Stacked Over Ball Grid Array Package
Integrated Circuit Package with Open Substrate
Semiconductor Package for a Large Die
System for Different Bond Pads in an Integrated Circuit Package
Semiconductor Package with Passive Device Integration
Method of Fabricating a Semiconductor Stacked Mulit-Package Module Having Inverted Second Package
Method of Fabricating a Semiconductor Multi-Package Module Having Inverted Land Grid Array (Lga) Package Stacked Over Ball Grid Array (Bga) Package
Dual Row Leadframe and Fabrication Method
Integrated Circuit Package System with Stiffener
Large Die Package Structures and Fabrication Method Therefor
Method of Fabricating a Semiconductor Multi-Package Module Having Inverted Land Grid Array (Lga) Package Stacked Over Ball Grid Array (Bga) Package
Integrated Circuit Package with Leadframe Locked Encapsulation and Method of Manufacture Therefor
Integrated Circuit Die with Pedestal
Semiconductor Multipackage Module Including Die and Inverted Land Grid Array Package Stacked Over Ball Grid Array Package
Integrated Circuit Packaging System with Passive Components
Stacked Integrated Circuit Leadframe Package System
Integrated Circuit Packaging System with High Lead Count and Method of Manufacture Thereof
Semiconductor Package Heat Spreader
Integrated Circuit Package with Open Substrate
Integrated Circuit Packaging System with Vertical Interconnection and Method of Manufacture Thereof
Wire Bond Interconnection and Method of Manufacture Thereof
Integrated Circuit Packaging System with Dual Connection and Method of Manufacture Thereof
Integrated Circuit Package with Open Substrate and Method of Manufacturing Thereof
Integrated Circuit Packaging System with Heat Spreader and Method of Manufacture Thereof
Integrated Circuit Packaging System with Routable Traces and Method of Manufacture Thereof
Patent:
9,105,620 →
Application:
14/038,577 →
Method of Manufacture of Integrated Circuit Packaging System with Plasma Processing
Patent:
9,093,278 →
Application:
14/137,352 →
Related Assignments
(5)
Other recorded transfers of the patents in this record — the chain of ownership.
Change of Name
Aug 6, 2015
From: ST ASSEMBLY TEST SERVICES LTD.
To: STATS CHIPPAC LTD.
Reel/Frame 036286/0590 →
Merger and Change of Name
Aug 6, 2015
From: CHIPPAC, INC.; STATS CHIPPAC, INC.
To: STATS CHIPPAC, INC.
Reel/Frame 036286/0612 →
Security Interest
Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Change of Name
Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0400 →
Release of Security Interest
Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052950/0497 →