Granted Patent B2

US 7,005,370 · App. 10/846,176 · Granted Feb 28, 2006

Abstract

Claims (54)

1. A method for manufacturing an integrated circuit package comprising:

providing a substrate having first and second contact pads thereon exposed through a passivation layer thereon;

forming a first metallurgy layer over the substrate;

forming a second metallurgy layer over the first metallurgy layer;

removing the first metallurgy layer while leaving a portion thereof over the second contact pad;

removing the second metallurgy layer while leaving a portion thereof over the second contact pad; and

forming a protective layer over the first contact pad while removing the first metallurgy layer.

2. The method as claimed in claim 1 wherein:

removing the first metallurgy layer uses an etching process; and

removing the second metallurgy layer uses an etching process with an etchant that reacts with the first contact pad to form the protective layer.

3. The method as claimed in claim 1 further comprising:

forming a cap layer over the substrate under the first metallurgy layer;

and wherein:

removing the first metallurgy layer forms the protective layer over the cap layer; and

removing the cap layer while leaving a portion thereof over the first and second contact pads.

4. The method as claimed in claim 1 further comprising:

wire bonding a wire-bond pad semiconductor die or package substrate to the first contact pad;

ball bonding a bump pad semiconductor die or package substrate to the second metallurgy layer over the second contact pad;

connecting the substrate to a semiconductor die or package substrate; and

encapsulating the substrate.

5. The method as claimed in claim 1 wherein:

providing the substrate provides at least one of the first and second contact pads using aluminum, an alloy thereof, or a compound thereof;

forming the first metallurgy layer uses titanium, an alloy thereof, or a compound thereof;

forming the second metallurgy layer uses at least one of nickel, vanadium, copper, an alloy thereof and a compound thereof;

removing the first metallurgy layer uses an etching process using fluorine;

removing the second metallurgy layer uses an etching process using fluorine; and

forming the protective layer forms the protective layer of aluminum fluoride.

6. A method for manufacturing an integrated circuit package comprising:

providing a substrate having first and second contact pads thereon exposed through a passivation layer thereon;

forming a first under bump metallurgy layer on the passivation layer;

forming a second under bump metallurgy layer over the first under bump metallurgy layer;

removing the first under bump metallurgy layer while leaving a portion thereof over the second contact pad;

removing the second under bump metallurgy layer while leaving a portion thereof over the second contact pad;

forming a protective layer over the first contact pad while removing the first under bump metallurgy layer; and

connecting the substrate to additional substrates by the first and second contact pads.

7. The method as claimed in claim 6 wherein:

providing the substrate provides the first contact pad using aluminum, an alloy thereof, or a compound thereof;

forming the first under bump metallurgy layer uses titanium, an alloy thereof, or a compound thereof; and

forming the second under bump metallurgy layer uses at least one of nickel, vanadium, copper, an alloy thereof and a compound thereof.

8. The method as claimed in claim 6 further comprising:

forming a cap layer over the substrate under the first under bump metallurgy layer, the cap layer uses at least one of aluminum, copper, an alloy thereof, and a compound thereof;

and wherein:

removing the first under bump metallurgy layer forms the protective layer over the cap layer; and

removing the cap layer while leaving a portion thereof over the first and second contact pads.

9. The method as claimed in claim 6 wherein:

connecting the substrate includes:

wire bonding a wire bond pad semiconductor die or package substrate to the first contact pad; and

ball bonding a bump pad semiconductor die or package substrate to the second under bump metallurgy layer over the second contact pad.

10. The method as claimed in claim 6 wherein:

connecting the substrate includes:

connecting the substrate to a package substrate by a wire bond;

connecting a further substrate to the substrate by a ball bond;

encapsulating the substrate; and

adding solder balls to the package substrate.

Assignments (7)