Integrated circuit package with open substrate and method of manufacturing thereof
View Patent ↗A method of manufacturing an integrated circuit package includes: forming a substrate including: forming a core layer, and forming vias in the core layer; forming a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias; and forming connections between an integrated circuit die and the conductive layer.
1. A method of manufacturing an integrated circuit package comprising:
forming a substrate including:
forming a core layer, and
forming vias in the core layer;
forming a conductive layer having a predetermined thickness on the core layer and having a fold within the vias having substantially twice the predetermined thickness in the vias, a center of the fold blocking off the vias;
forming terminals from the conductive layer, the terminals under and in direct contact with the core layer; and
forming connections between an integrated circuit die and the conductive layer.
2. The method as claimed in claim 1 further comprising:
encapsulating the integrated circuit die with an encapsulant, the encapsulant extending into the vias.
3. The method as claimed in claim 1 wherein
forming terminals includes froming the terminals having a shape of at least one of square, rectangular, and round.
4. The method as claimed in claim 1 further comprising:
forming solder balls connected to the terminals.
5. The method as claimed in claim 1 further comprising:
forming solder balls on the conductive layer on the core layer.