IP Library Granted Patent US 8,531,012
Granted Patent B2
US 8,531,012 · App. 12/605,292 · Granted Sep 10, 2013

Semiconductor device and method of forming a shielding layer over a semiconductor die disposed in a cavity of an interconnect structure and grounded through the die TSV

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Quick Facts
Patent No.
US 8,531,012
App. No.
12/605,292
Granted
Sep 10, 2013
Kind
B2
Abstract

A semiconductor device has an interconnect structure with a cavity formed partially through the interconnect structure. A first semiconductor die is mounted in the cavity. A first TSV is formed through the first semiconductor die. An adhesive layer is deposited over the interconnect structure and first semiconductor die. A shielding layer is mounted over the first semiconductor die. The shielding layer is secured to the first semiconductor die with the adhesive layer and grounded through the first TSV and interconnect structure to block electromagnetic interference. A second semiconductor die is mounted to the shielding layer and electrically connected to the interconnect structure. A second TSV is formed through the second semiconductor die. An encapsulant is deposited over the shielding layer, second semiconductor die, and interconnect structure. A slot is formed through the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die.

Claims (62)

1. A method of manufacturing a semiconductor device, comprising:

forming an interconnect structure;

forming a cavity in a first surface partially through the interconnect structure;

providing a first semiconductor die;

forming a first through silicon via (TSV) through the first semiconductor die;

mounting the first semiconductor die in the cavity;

depositing an adhesive layer over a first surface of the first semiconductor die;

mounting a shielding layer over the first surface of the first semiconductor die, the shielding layer being secured to the first semiconductor die with the adhesive layer and grounded through the first TSV and interconnect structure to block electromagnetic interference; and

depositing an encapsulant over the shielding layer and interconnect structure.

2. The method of claim 1 , further including forming a slot in the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die.

3. The method of claim 1 , further including:

mounting a second semiconductor die to the shielding layer prior to depositing the encapsulant; and

electrically connecting the second semiconductor die to the interconnect structure.

4. The method of claim 3 , further including forming a second TSV through the second semiconductor die.

5. The method of claim 3 , further including forming an adhesive layer over the shielding layer to attach the second semiconductor die.

6. The method of claim 1 , wherein forming the interconnect structure includes:

forming an insulating layer;

forming a conductive layer within the insulating layer; and

forming a bump over a second surface of the interconnect structure opposite the first surface of the interconnect structure.

7. The method of claim 1 , further including forming a bump over a second surface of the first semiconductor die opposite the first surface of the first semiconductor die.

8. A method of manufacturing a semiconductor device, comprising:

forming an interconnect structure;

forming a cavity in the interconnect structure;

providing a first semiconductor die or component;

forming a first conductive via through the first semiconductor die or component;

mounting the first semiconductor die or component in the cavity;

mounting a shielding layer over the first surface of the first semiconductor die or component, the shielding layer being grounded through the first conductive via and interconnect structure; and

depositing an encapsulant over the shielding layer and interconnect structure.

9. The method of claim 8 , further including forming a slot in the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die or component.

10. The method of claim 8 , wherein the shielding layer blocks electromagnetic interference.

11. The method of claim 8 , further including:

mounting a second semiconductor die or component to the shielding layer prior to depositing the encapsulant; and

electrically connecting the second semiconductor die or component to the interconnect structure.

12. The method of claim 11 , further including forming a second conductive via through the second semiconductor die or component.

13. The method of claim 8 , further including forming a bump over a second surface of the first semiconductor die or component opposite the first surface of the first semiconductor die or component.

14. A method of making a semiconductor device, comprising:

forming an interconnect structure;

forming a cavity in the interconnect structure;

disposing a first semiconductor die or component in the cavity after forming the cavity in the interconnect structure;

forming a first conductive via through the first semiconductor die or component;

disposing a shielding layer over the first semiconductor die or component;

electrically connecting the shielding layer to the first conductive via and interconnect structure; and

depositing an encapsulant over the shielding layer and interconnect structure and further through an opening in the shielding layer around the semiconductor die.

15. The method of claim 14 , wherein the shielding layer blocks electromagnetic interference.

16. The method of claim 14 , further including:

disposing a second semiconductor die or component over the shielding layer prior to depositing the encapsulant; and

electrically connecting the second semiconductor die or component to the interconnect structure.

17. The method of claim 16 , further including forming a second conductive via through the second semiconductor die or component.

18. A method of making a semiconductor device, comprising:

forming an interconnect structure;

forming a cavity in the interconnect structure;

disposing a first semiconductor die or component in the cavity;

disposing a planar shielding layer over the first semiconductor die or component;

disposing a second semiconductor die or component over the first semiconductor die or component;

electrically connecting the second semiconductor die or component to the interconnect structure; and

depositing an encapsulant over the shielding layer, second semiconductor die, and interconnect structure.

19. The method of claim 18 , further including:

forming a first conductive via through the first semiconductor die or component; and

electrically connecting the shielding layer to the first conductive via and interconnect structure.

20. The method of claim 18 , further including forming a slot in the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die or component.

21. The method of claim 18 , wherein the shielding layer blocks electromagnetic interference.

22. The method of claim 18 , further including forming a second conductive via through the second semiconductor die or component.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE," TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038401 FRAME: 0532. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0109 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 11, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038401/0532 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2009
From: LEE, SINJAE; KIM, JINGWAN; OH, JIHOON; LEE, KYUWON; LIM, JAEHYUN
To: STATS CHIPPAC, LTD.
Reel/Frame 023418/0164 →