IP Library Granted Patent US 8,518,752
Granted Patent B2
US 8,518,752 · App. 12/629,881 · Granted Aug 27, 2013

Integrated circuit packaging system with stackable package and method of manufacture thereof

Inventors: DeokKyung Yang (Hanam-si, KR); DaeSik Choi (Seoul, KR)
Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 8,518,752
App. No.
12/629,881
Granted
Aug 27, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a package base having an inward base side and an outward base side; mounting a device over the inward base side and connected to the outward base side; connecting a silicon interposer having a through silicon via to the device and having an external side facing away from the device; and applying an encapsulant around the device, over the package base, and over the silicon interposer with the external side substantially exposed, the encapsulant having a protrusion over the outward base side.

Claims (51)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a package base having an opening, an inward base side, and an outward base side;

mounting a device on the inward base side and connected to the outward base side, the opening offset towards one of the ends of the device;

mounting a silicon interposer having a through silicon via and an internal side to the device with an adhesive top layer, the silicon interposer having an external side facing away from the device and the adhesive top layer directly on the non-active side of the device and a portion of an end of the device;

attaching an internal interconnect to the internal side and to the inward base side, facing each other, using a reflow bonding process; and

applying an encapsulant around the device, over the package base, and over the silicon interposer with the external side substantially exposed, the encapsulant having a protrusion over the outward base side.

2. The method as claimed in claim 1 further comprising connecting an integrated circuit package over the silicon interposer.

3. The method as claimed in claim 1 wherein forming the protrusion includes forming a depression of the protrusion.

4. The method as claimed in claim 1 wherein forming the encapsulant includes:

forming a first protrusion over the outward base side; and

forming a second protrusion over the outward base side.

5. The method as claimed in claim 1 further comprising:

mounting a stack package over the silicon interposer; and

mounting another stack package over a silicon interposer of the stack package.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a package base having an opening, an inward base side, and an outward base side;

mounting a device on the inward base side and connected to the outward base side, the opening offset towards one of the ends of the device;

mounting a silicon interposer having a through silicon via and an internal side to the device with an adhesive top layer, the silicon interposer having an external side facing away from the device and the adhesive top layer directly on the non-active side of the device and a portion of an end of the device;

attaching an internal interconnect to the internal side and to the inward base side, facing each other, using a reflow bonding process; and

applying an encapsulant around the device, over the package base, and over the silicon interposer with the external side substantially exposed, the encapsulant having a protrusion on a portion of the outward base side.

7. The method as claimed in claim 6 further comprising connecting an integrated circuit package over the silicon interposer and to the through silicon via.

8. The method as claimed in claim 6 wherein forming the protrusion includes forming a depression of the protrusion having the outward base side partially exposed within the depression.

9. The method as claimed in claim 6 wherein forming the encapsulant includes:

forming a first protrusion over the outward base side; and

forming a second protrusion over the outward base side, the second protrusion offset from the first protrusion.

10. The method as claimed in claim 6 further comprising:

mounting a stack package having a silicone interposer over the package base; and

mounting another stack package having another silicon interposer over a package base of the stack package.

11. An integrated circuit packaging system comprising:

a package base having an opening, an inward base side, and an outward base side;

a device mounted on the inward base side and connected to the outward base side, the opening offset towards one of the ends of the device;

a silicon interposer having a through silicon via and an internal side mounted side to the device with an adhesive top layer, the silicon interposer having an external side facing away from the device and the adhesive top layer directly on the non-active side of the device and a portion of an end of the device;

an internal interconnect attached to the internal side and to the inward base side facing each other, the internal interconnect having characteristics of a reflow bonding process; and

an encapsulant around the device, over the package base, and over the silicon interposer with the external side substantially exposed, the encapsulant having a protrusion over the outward base side.

12. The system as claimed in claim 11 further comprising an integrated circuit package connected over the silicon interposer.

13. The system as claimed in claim 11 wherein the protrusion includes a depression.

14. The system as claimed in claim 11 wherein the encapsulant includes:

a first protrusion over the outward base side; and

a second protrusion over the outward base side.

15. The system as claimed in claim 11 further comprising:

a stack package mounted over the silicon interposer; and

another stack package mounted over a silicon interposer of the stack package.

16. The system as claimed in claim 11 wherein the protrusion is on a portion of the outward base side.

17. The system as claimed in claim 16 further comprising an integrated circuit package connected over the silicon interposer and to the through silicon via.

18. The system as claimed in claim 16 wherein the protrusion includes a depression having the outward base side partially exposed within the depression.

19. The system as claimed in claim 16 wherein the encapsulant includes:

a first protrusion over the outward base side; and

a second protrusion over the outward base side, the second protrusion offset from the first protrusion.

20. The system as claimed in claim 16 further comprising:

a stack package having a silicone interposer mounted over the package base; and

another stack package having another silicon interposer mounted over a package base of the stack package.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE," TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038401 FRAME: 0532. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0109 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 11, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038401/0532 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2009
From: YANG, DEOKKYUNG; CHOI, DAESIK
To: STATS CHIPPAC LTD.
Reel/Frame 023685/0201 →
Continuity (1)
Related Publication 20110127662A1 · Jun 2, 2011