IP Library Granted Patent US 8,653,654
Granted Patent B2
US 8,653,654 · App. 12/639,990 · Granted Feb 18, 2014

Integrated circuit packaging system with a stackable package and method of manufacture thereof

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Quick Facts
Patent No.
US 8,653,654
App. No.
12/639,990
Granted
Feb 18, 2014
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming a base assembly having a cavity and a through conductor adjacent to the cavity; connecting a first device to the base assembly with the first device within the cavity; connecting a second device to the base assembly with the second device within the cavity; and connecting an interposer substrate having an exposed external side over the through conductor with the exposed external side facing away from the through conductor and exposed to ambient.

Claims (42)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming a base assembly having a base substrate and an interconnect substrate, the base substrate and the interconnect substrate each having an outer peripheral surface coplanar with the outer peripheral surface of the other and cooperating to form a cavity in the base assembly, the interconnect substrate having a columnar through conductor adjacent to the cavity with a conductive attachment material conductively connected to the columnar through conductor for attaching the interconnect substrate to the base substrate;

connecting a first device to the base assembly with the first device within the cavity;

connecting a second device to the base assembly with the second device horizontally adjacent to the first device and within the cavity; and

connecting an interposer substrate having an outer peripheral surface coplanar with the outer peripheral surface of the interconnect substrate, the interposer substrate having a conductive attachment material conductively connected to the columnar through connector for attaching the interposer substrate to the interconnect substrate, the interposer substrate covering the cavity.

2. The method as claimed in claim 1 wherein connecting the interposer substrate includes:

providing a conductive plane on the interposer substrate covering the cavity.

3. The method as claimed in claim 1 further comprising attaching a seal ring to the base assembly around the cavity.

4. The method as claimed in claim 1 further comprising:

connecting an interposer device to the interposer substrate; and

wherein connecting the interposer substrate over the through conductor includes:

mounting the interposer device within the cavity and over the first device.

5. The method as claimed in claim 1 further comprising connecting a passive device to the base assembly with the passive device within the cavity.

6. A method of manufacture of an integrated circuit packaging system comprising:

forming a base assembly having a base substrate and an interconnect substrate, the base substrate and the interconnect substrate each having an outer peripheral surfaces coplanar with the outer peripheral surface of the other and cooperating to form a cavity in the base assembly, the interconnect substrate having a plurality of columnar through conductors around and adjacent to the cavity with conductive attachment material conductively connected to the columnar through conductors for attaching the interconnect substrate to the base substrate;

connecting a first device to the base assembly with the first device within the cavity;

connecting a second device to the base assembly with the second device horizontally adjacent to the first device and within the cavity; and

connecting an interposer substrate having a coplanar outer peripheral surface with the coplanar outer peripheral surfaces of the base substrate and the interconnect substrate, the interposer substrate having conductive attachment material conductively connected to the plurality of columnar through connectors for attaching the interposer substrate to the interconnect substrate, the interposer substrate covering the cavity.

7. The method as claimed in claim 6 wherein connecting the interposer substrate includes a conductive plane parallel to an exposed external side of the interposer substrate and over the base assembly.

8. The method as claimed in claim 6 further comprising:

attaching a first stack package over the interposer substrate with the first stack package having a further interposer substrate; and

attaching a second stack package over the first stack package with the second stack package connected to the further interposer substrate.

9. The method as claimed in claim 6 wherein forming the base assembly having the cavity includes forming the base assembly with a spacer portion adjacent to the cavity.

10. The method as claimed in claim 6 wherein connecting the first device includes encapsulating the first device.

11. An integrated circuit packaging system comprising:

a base assembly having a base substrate and an interconnect substrate, the base substrate and the interconnect substrate having coplanar outer peripheral surfaces and cooperating to form a cavity in the base assembly, the interconnect substrate having a columnar through conductor adjacent to the cavity with a conductive attachment material conductively connected to the columnar through conductor for attaching the interconnect substrate to the base substrate;

a first device connected to the base assembly with the first device within the cavity;

a second device connected to the base assembly with the second device horizontally adjacent to the first device and within the cavity; and

an interposer substrate having a coplanar outer peripheral surface with the coplanar outer peripheral surfaces of the base substrate and the interconnect substrate, the interposer substrate having a conductive attachment material conductively connected to the columnar through connector for attaching the interposer substrate to the interconnect substrate, the interposer substrate covering the cavity.

12. The system as claimed in claim 11 wherein the interposer substrate includes a conductive plane on the interposer substrate covering the cavity.

13. The system as claimed in claim 11 further comprising a seal ring attached to the base assembly around the cavity.

14. The system as claimed in claim 11 further comprising an interposer device connected to the interposer substrate and the interposer device within the cavity and over the first device.

15. The system as claimed in claim 11 further comprising a passive device connected to the base assembly with the passive device within the cavity.

16. The system as claimed in claim 11 wherein:

the interconnect substrate has a plurality of columnar through conductors adjacent to the cavity with conductive attachment material conductively connected to the columnar through conductors for attaching the interconnect substrate to the base substrate; and

the interposer substrate having conductive attachment material conductively connected to the columnar through connectors for attaching the interposer substrate to the interconnect substrate.

17. The system as claimed in claim 16 wherein the interposer substrate includes a conductive plane parallel to an exposed external side of the interposer substrate and over the base assembly.

18. The system as claimed in claim 16 further comprising:

a first stack package over the interposer substrate with the first stack package having a further interposer substrate; and

a second stack package over the first stack package with the second stack package connected to the further interposer substrate.

19. The system as claimed in claim 16 wherein the base assembly includes a spacer portion adjacent to the cavity.

20. The system as claimed in claim 16 wherein the first device is encapsulated.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0227. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0368 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0227 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2010
From: CHANDRA, HARRY; MARTIN, ROBERT J., III
To: STATS CHIPPAC LTD.
Reel/Frame 025570/0142 →