Patent Assignment
Reel/Frame 038378/0227
Change of Name
Recorded: 2016-04-07
Received: 2016-04-07
Pages: 8
Assignor
STATS CHIPPAC LTD.
Executed: 2016-03-29
Assignee
STATS CHIPPAC PTE. LTE.
5 YISHUN STREET 23, SINGAPORE, SXX, SINT MAARTEEN
Covered Properties
(63)
Semiconductor Device and Method of Forming Interconnect Structure with Conductive Pads Having Expanded Interconnect Surface Area for Enhanced Interconnection Properties
Application:
13/768,862 →
Method of Forming Top Electrode for Capacitor and Interconnection in Integrated Passive Device (IPD)
Application:
13/765,478 →
Solder Joint Flip Chip Interconnection Having Relief Structure
Application:
13/756,817 →
Semiconductor Device and Method of Forming Conductive TSV With Insulating Annular Ring
Application:
13/691,578 →
Stackable Integrated Circuit Package System
Application:
13/649,834 →
Integrated Circuit Packaging System with Encapsulation and Underfill and Method of Manufacture Thereof
Application:
13/597,086 →
Integrated Circuit Packaging System with Array Contacts and Method of Manufacture Thereof
Application:
13/586,178 →
Semiconductor Device and Method of Forming Discontinuous ESD Protection Layers Between Semiconductor Die
Application:
13/560,008 →
Integrated Circuit Package System with Waferscale Spacer
Application:
13/536,268 →
Integrated Circuit Packaging System Having Warpage Prevention Structures
Application:
13/526,877 →
Integrated Circuit Packaging System with Through Silicon via and Method of Manufacture Thereof
Application:
13/517,897 →
Integrated Circuit Packaging System with an Encapsulation and Method of Manufacture Thereof
Application:
13/495,663 →
Integrated Circuit Packaging System with Warpage Preventing Mechanism and Method of Manufacture Thereof
Application:
13/490,908 →
Embedded Semiconductor Die Package and Method of Making the Same Using Metal Frame Carrier
Application:
13/446,741 →
Electronic System with Expansion Feature
Application:
13/441,550 →
Integrated Circuit Packaging System with Ultra-Thin Chip and Method of Manufacture Thereof
Application:
13/426,529 →
Semiconductor Device and Method of Shielding Semiconductor Die from Inter-Device Interference
Application:
13/339,185 →
Semiconductor Package Having Semiconductor Die with Internal Vertical Interconnect Structure and Method Therefor
Application:
13/335,867 →
Integrated Circuit Packaging System with Leads and Method of Manufacture Thereof
Application:
13/327,529 →
Integrated Circuit Packaging System with Heat Slug and Method of Manufacture Thereof
Application:
13/325,359 →
Integrated Circuit Packaging System with Coupling Features and Method of Manufacture Thereof
Application:
13/326,116 →
Semiconductor Device and Method of Forming Fo-Wlcsp with Multiple Encapsulants
Application:
13/326,157 →
Integrated Circuit Packaging System with Heat Conduction and Method of Manufacture Thereof
Application:
13/325,530 →
Chest Pad for Cpr Feedback Device
Application:
29/403,126 →
Semiconductor Device Having an Interconnect Structure with Tsv Using Encapsulant for Structural Support
Application:
13/245,099 →
Integrated Circuit Packaging System with External Wire Connection and Method of Manufacture Thereof
Application:
13/244,262 →
Integrated Circuit Packaging System with Encapsulation and Method of Manufacture Thereof
Application:
13/243,886 →
Integrated Circuit Packaging System with Stack Device
Application:
13/243,699 →
Integrated Circuit Packaging System with Interposer and Method of Manufacture Thereof
Application:
13/237,918 →
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask
Application:
13/218,653 →
Integrated Circuit Packaging System with Die Paddle and Method of Manufacture Thereof
Application:
13/197,070 →
Leadless Integrated Circuit Packaging System and Method of Manufacture Thereof
Application:
13/195,465 →
Semiconductor Package and Method of Mounting Semiconductor Die to Opposite Sides of Tsv Substrate
Application:
13/191,386 →
Integrated Circuit Packaging System Having a Cavity
Application:
13/187,252 →
Flip Chip Interconnection Structure
Application:
13/175,694 →
Integrated Circuit Packaging System with Vertical Interconnects and Method of Manufacture Thereof
Application:
13/166,802 →
Integrated Circuit Packaging System with Thermal Dispersal Structures and Method of Manufacture Thereof
Application:
13/163,611 →
Integrated Circuit Packaging System with Laser Hole and Method of Manufacture Thereof
Application:
13/163,150 →
Integrated Circuit Packaging System with Formed Interconnects and Method of Manufacture Thereof
Application:
13/102,052 →
Integrated Circuit Packaging System with Plated Leads and Method of Manufacture Thereof
Application:
13/069,744 →
Integrated Circuit Packaging System with Interconnects and Method of Manufacture Thereof
Application:
12/966,071 →
Semiconductor Device and Method of Confining Conductive Bump Material with Solder Mask Patch
Application:
12/963,919 →
Integrated Circuit Packaging System with Pad Connection and Method of Manufacture Thereof
Application:
12/961,489 →
Ultra Thin Bumped Wafer With Under-Film
Application:
12/911,592 →
Integrated Circuit Packaging System with Interlock and Method of Manufacture Thereof
Application:
12/890,491 →
Integrated Circuit Packaging System with Encapsulation and Method of Manufacture Thereof
Application:
12/730,989 →
Extended Redistribution Layers Bumped Wafer
Application:
12/704,345 →
Integrated Circuit Packaging System with a Stackable Package and Method of Manufacture Thereof
Application:
12/639,990 →
Integrated Circuit Packaging System with a Leaded Package and Method of Manufacture Thereof
Application:
12/565,144 →
Integrated Circuit Packaging System with an Integral-Interposer-Structure and Method of Manufacture Thereof
Application:
12/410,945 →
Integrated Circuit Package-on-Package Stacking System and Method of Manufacture Thereof
Application:
12/371,730 →
Integrated Circuit Package System with Input/Output Expansion
Application:
12/333,298 →
Integrated Circuit Packaging System with Stacked Paddle and Method of Manufacture Thereof
Application:
12/328,759 →
Integrated Circuit Package System with Anti-Peel Contact Pads
Application:
12/235,288 →
Integrated Circuit Package System with Interposer
Application:
12/040,558 →
System and Apparatus for Wafer Level Integration of Components
Application:
11/965,383 →
Integrated Circuit Package System Having Perimeter Paddle
Application:
11/766,771 →
Integrated Circuit Package System with Offset Stack
Application:
11/762,055 →
Electronic System with Vertical Intermetallic Compound
Application:
11/758,635 →
Integrated Circuit Package System with Bonding Lands
Application:
11/677,477 →
Integrated Passive Device System
Application:
11/553,949 →
Integrated circuit package system with exposed interconnects
Application:
11/354,806 →
Integrated Circuit Package System Including Wide Flange Leadframe
Application:
11/307,129 →