IP Library Granted Patent US 8,723,324
Granted Patent B2
US 8,723,324 · App. 12/961,489 · Granted May 13, 2014

Integrated circuit packaging system with pad connection and method of manufacture thereof

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Quick Facts
Patent No.
US 8,723,324
App. No.
12/961,489
Granted
May 13, 2014
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming a lead having a lead bottom side and a lead top side; applying a passivation over the lead with the lead top side exposed from the passivation; forming an interconnect structure directly on the passivation and the lead top side, the interconnect structure having an inner pad and an outer pad with a recess above the lead top side; mounting an integrated circuit over the inner pad and the passivation; and molding an encapsulation over the integrated circuit.

Claims (46)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming multiple rows of leads, one of the leads having a lead bottom side and a lead top side;

applying a passivation over the one of the leads with the lead top side exposed from the passivation;

forming an interconnect structure directly on the passivation and the lead top side, the interconnect structure having an inner pad and an outer pad with a recess above the lead top side, wherein the interconnect structure connects the inner pad to the outer pad and the outer pad is directly on the lead top side;

mounting an integrated circuit over the inner pad and the passivation, wherein the multiple rows of the leads are outside a perimeter of the integrated circuit; and

molding an encapsulation over the integrated circuit.

2. The method as claimed in claim 1 wherein forming the interconnect structure includes forming the interconnect structure having the outer pad with a non-vertical base directly on the lead top side.

3. The method as claimed in claim 1 wherein forming the interconnect structure includes forming the interconnect structure having a conductive trace attached to the inner pad and the outer pad.

4. The method as claimed in claim 1 wherein forming the multiple rows of the leads includes forming the one of the leads having a horizontal ridge between the lead bottom side and the lead top side.

5. The method as claimed in claim 1 further comprising forming a pillar having a pillar non-horizontal side facing a lead non-horizontal side of the one of the leads.

6. A method of manufacture of an integrated circuit packaging system comprising:

forming multiple rows of leads, one of the leads having a lead bottom side and a lead top side;

applying a passivation over the one of the leads with the lead top side exposed from the passivation;

forming an interconnect structure directly on the passivation and the lead top side, the interconnect structure having an inner pad and an outer pad with a recess above the lead top side, wherein the interconnect structure connects the inner pad to the outer pad and the outer pad is directly on the lead top side;

mounting an integrated circuit over the inner pad and the passivation, wherein the multiple rows of the leads are outside a perimeter of the integrated circuit;

attaching an internal connector to the integrated circuit and the inner pad; and

molding an encapsulation over the integrated circuit.

7. The method as claimed in claim 6 wherein forming the interconnect structure includes forming the interconnect structure having a non-horizontal sidewall extending from a non-vertical base directly on the lead top side.

8. The method as claimed in claim 6 wherein forming the interconnect structure includes forming the interconnect structure having a conductive trace attached to and integral with the inner pad and the outer pad.

9. The method as claimed in claim 6 wherein:

forming the multiple rows of the leads includes forming the one of the leads having a horizontal ridge between the lead bottom side and the lead top side; and

applying the passivation includes applying the passivation directly on a ridge upper side of the horizontal ridge.

10. The method as claimed in claim 6 further comprising:

forming a pillar having a pillar top side and a pillar non-horizontal side facing a lead non-horizontal side of the one of the leads; and

wherein:

forming the interconnect structure includes forming the interconnect structure having the inner pad directly on the pillar top side.

11. An integrated circuit packaging system comprising:

multiple rows of leads, one of the leads having a lead bottom side and a lead top side;

a passivation over the one of the leads with the lead top side exposed from the passivation;

an interconnect structure directly on the passivation and the lead top side, the interconnect structure having an inner pad and an outer pad with a recess above the lead top side, wherein the interconnect structure connects the inner pad to the outer pad and the outer pad is directly on the lead top side;

an integrated circuit over the inner pad and the passivation, wherein the multiple rows of the leads are outside a perimeter of the integrated circuit; and

an encapsulation over the integrated circuit.

12. The system as claimed in claim 11 wherein the interconnect structure includes the outer pad with a non-vertical base directly on the lead top side.

13. The system as claimed in claim 11 wherein the interconnect structure includes a conductive trace attached to the inner pad and the outer pad.

14. The system as claimed in claim 11 wherein the one of the leads includes a horizontal ridge between the lead bottom side and the lead top side.

15. The system as claimed in claim 11 further comprising a pillar having a pillar non-horizontal side facing a lead non-horizontal side of the one of the leads.

16. The system as claimed in claim 11 further comprising an internal connector attached to the integrated circuit and the inner pad.

17. The system as claimed in claim 16 wherein the interconnect structure includes a non-horizontal sidewall extending from a non-vertical base directly on the lead top side.

18. The system as claimed in claim 16 wherein the interconnect structure includes a conductive trace attached to and integral with the inner pad and the outer pad.

19. The system as claimed in claim 16 wherein:

the one of the leads includes a horizontal ridge between the lead bottom side and the lead top side; and

the passivation is directly on a ridge upper side of the horizontal ridge.

20. The system as claimed in claim 16 further comprising:

a pillar having a pillar top side and a pillar non-horizontal side facing a lead non-horizontal side of the one of the leads; and

wherein:

the interconnect structure includes the inner pad directly on the pillar top side.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0227. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0368 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0227 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2010
From: CAMACHO, ZIGMUND RAMIREZ; BATHAN, HENRY DESCALZO; ESPIRITU, EMMANUEL; MERILO, DIOSCORO A.
To: STATS CHIPPAC LTD.
Reel/Frame 025496/0655 →