IP Library Granted Patent US 8,716,108
Granted Patent B2
US 8,716,108 · App. 13/426,529 · Granted May 6, 2014

Integrated circuit packaging system with ultra-thin chip and method of manufacture thereof

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Quick Facts
Patent No.
US 8,716,108
App. No.
13/426,529
Granted
May 6, 2014
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a circuit substrate having an active side opposite to an inactive portion; attaching a nonconductive cover to the active side; forming a separation-gap partially cutting into the nonconductive cover and the circuit substrate to a kerf depth; attaching a back-grinding tape to the nonconductive cover; removing a portion of the inactive portion; and exposing the nonconductive cover by removing the back-grinding tape.

Claims (48)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a circuit substrate having an active side opposite to an inactive portion;

attaching a nonconductive cover to the active side;

forming a separation-gap partially cutting into the nonconductive cover and the circuit substrate to a kerf depth;

attaching a back-grinding tape to the nonconductive cover;

removing a portion of the inactive portion;

exposing the nonconductive cover by removing the back-grinding tape; and

mounting the circuit substrate and the nonconductive cover over a substrate with the nonconductive cover between the substrate and the active side, wherein mounting the circuit substrate includes:

positioning the circuit substrate over the substrate;

heating the nonconductive cover;

pressing the circuit substrate on to the substrate;

reshaping the nonconductive cover; and

removing portions of the nonconductive cover off of the substrate.

2. The method as claimed in claim 1 wherein:

providing the circuit substrate includes attaching a die connector over the active side; and

attaching the nonconductive cover includes enclosing the die connector within the nonconductive cover.

3. The method as claimed in claim 1 wherein attaching the nonconductive cover includes applying a nonconductive paste.

4. The method as claimed in claim 1 wherein attaching the nonconductive cover includes laminating a nonconductive film.

5. The method as claimed in claim 1 wherein attaching the nonconductive cover includes softening the nonconductive cover with heat.

6. The method as claimed in claim 1 wherein mounting the circuit substrate includes forming a nonconductive layer between the substrate and the active side from the nonconductive cover.

7. The method as claimed in claim 1 wherein removing the inactive portion includes grinding the inactive portion off the circuit substrate.

8. The method as claimed in claim 1 further comprising separating portions of the circuit substrate after the inactive portion has been removed.

9. A method of manufacture of an integrated circuit packaging system comprising:

providing a circuit substrate having an active side opposite to an inactive portion, and a die connector coupled to the active side;

attaching a nonconductive cover having a cover surface to the active side with the cover surface opposing the active side;

cutting through the nonconductive cover and the circuit substrate to form a separation-gap having a kerf depth;

attaching a back-grinding tape to the cover surface and the separation-gap;

removing the inactive portion to form an integrated circuit die from portions of the circuit substrate forming the separation-gap;

removing the back-grinding tape; and

mounting the integrated circuit die and the nonconductive cover over a substrate with the nonconductive cover between the substrate and the active side, wherein mounting the integrated circuit die includes:

providing the substrate having a substrate-cavity defined by surface masks and a substrate-pad within the substrate-cavity; and

aligning the integrated circuit die directly over the substrate-cavity using the surface masks or the die connector directly over the substrate-pad.

10. The method as claimed in claim 9 wherein mounting the integrated circuit die includes forming a nonconductive layer from the nonconductive cover between the substrate and the active side of the integrated circuit die.

11. The method as claimed in claim 9 wherein:

attaching the nonconductive cover includes forming the cover surface parallel to and above the active side; and

attaching the back-grinding tape includes forming a planar surface opposite to the nonconductive cover and parallel to the active side.

12. A method of manufacture of an integrated circuit packaging system comprising:

providing a circuit substrate having an active side opposite to an inactive portion;

attaching a nonconductive cover having a cover surface to the active side with the cover surface opposing the active side, the nonconductive cover of transparent material;

cutting through the nonconductive cover and the circuit substrate to form a separation-gap having a kerf depth;

attaching a back-grinding tape to the cover surface and the separation-gap;

removing the inactive portion to form an integrated circuit die from portions of the circuit substrate forming the separation-gap;

removing the back-grinding tape; and

mounting the integrated circuit die and the nonconductive cover over a substrate with the nonconductive cover between the substrate and the active side, including aligning the integrated circuit die based on details on the active side observed through the nonconductive cover.

13. The method as claimed in claim 12 wherein mounting the integrated circuit die includes forming a nonconductive layer from the nonconductive cover between the substrate and the active side of the integrated circuit die.

14. The method as claimed in claim 12 wherein:

attaching the nonconductive cover includes forming the cover surface parallel to and above the active side; and

attaching the back-grinding tape includes forming a planar surface opposite to the nonconductive cover and parallel to the active side.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0227. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0368 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →