IP Library Granted Patent US 8,704,365
Granted Patent B2
US 8,704,365 · App. 13/187,252 · Granted Apr 22, 2014

Integrated circuit packaging system having a cavity

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Quick Facts
Patent No.
US 8,704,365
App. No.
13/187,252
Granted
Apr 22, 2014
Kind
B2
Abstract

An integrated circuit packaging system includes: a carrier, having a carrier top side and a carrier bottom side, without an active device attached to the carrier bottom side; an interconnect over the carrier; and a first encapsulation, having a cavity, around the interconnect over the carrier top side with the interconnect partially exposed from the first encapsulation, and with the carrier top side partially exposed with the cavity.

Claims (20)

1. An integrated circuit packaging system comprising:

a carrier, having a carrier top side and a carrier bottom side, without an active device attached to the carrier bottom side;

an interconnect over the carrier;

a first encapsulation, having a cavity, around the interconnect over the carrier top side with the interconnect partially exposed from the first encapsulation, and with the carrier top side partially exposed with the cavity, the first encapsulation having a different material composition than the carrier; and

an integrated circuit within the cavity and over the first encapsulation.

2. The system as claimed in claim 1 wherein the integrated circuit is over the carrier top side.

3. The system as claimed in claim 1 wherein:

the integrated circuit is over the carrier; and further comprising:

a second encapsulation over the integrated circuit with the cavity filled with the second encapsulation.

4. The system as claimed in claim 1 wherein the first encapsulation is along the periphery of the carrier.

5. The system as claimed in claim 1 further comprising:

an integrated circuit package over the first encapsulation; and

a package interconnect between the integrated circuit package and the interconnect.

6. The system as claimed in claim 1 wherein:

the interconnect is formed in a vertical configuration; and

the first encapsulation is along the periphery of the carrier.

7. The system as claimed in claim 6 wherein the integrated circuit is over the carrier.

8. The system as claimed in claim 6 wherein the carrier top side includes a connection site attached to the interconnect.

9. The system as claimed in claim 6 further comprising the interconnect includes a solder ball.

10. The system as claimed in claim 6 further comprising an external interconnect attached to the carrier bottom side.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0227. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0368 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0227 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →