Extended redistribution layers bumped wafer
View Patent ↗A semiconductor device is manufactured by, first, providing a wafer, designated with a saw street guide, and having a bond pad formed on an active surface of the wafer. The wafer is taped with a dicing tape. The wafer is singulated along the saw street guide into a plurality of dies having a plurality of gaps between each of the plurality of dies. The dicing tape is stretched to expand the plurality of gaps to a predetermined distance. An organic material is deposited into each of the plurality of gaps. A top surface of the organic material is substantially coplanar with a top surface of a first die of the plurality of dies. A redistribution layer is patterned over a portion of the organic material. An under bump metallization (UBM) is deposited over the organic material in electrical communication, through the redistribution layer, with the bond pad.
1. A semiconductor device, comprising:
a semiconductor die;
a plurality of bond pads formed over a surface of the semiconductor die;
an organic material deposited around a peripheral region of the semiconductor die and substantially coplanar with the surface of the semiconductor die;
a plurality of first under bump metallization (UBM) formed directly on the organic material;
a plurality of bumps formed over the bond pads and first UBM; and
a conductive layer formed over the organic material and electrically connected to one of the first UBM and one of the bond pads.
2. The semiconductor device of claim 1 , wherein the organic material includes benzocyclobutene or polyimide.
3. The semiconductor device of claim 1 , further including a plurality of second UBM formed over the semiconductor die.
4. The semiconductor device of claim 1 , wherein the first UBM includes non-refractory metal and binary metal alloy.
5. A semiconductor device, comprising:
a semiconductor die;
a plurality of bond pads formed over a surface of the semiconductor die;
an organic material deposited around a peripheral region of the semiconductor die and substantially coplanar with the surface of the semiconductor die;
a plurality of first under bump metallization (UBM) formed in contact with the organic material and on each side of the semiconductor die; and
a conductive layer formed over the organic material and electrically connected to one of the first UBM and one of the bond pads.
6. A semiconductor device, comprising:
a semiconductor die;
a bond pad formed over a surface of the semiconductor die;
an insulating material deposited around a peripheral region of the semiconductor die and coplanar with the surface of the semiconductor die;
a first under bump metallization (UBM) formed contacting the insulating material; and
a conductive layer formed over the insulating material.
7. The semiconductor device of claim 6 , further including a bump formed over the first UBM.
8. The semiconductor device of claim 6 , wherein the insulating material includes benzocyclobutene or polyimide.
9. The semiconductor device of claim 6 , further including a second UBM formed over the semiconductor die.
10. The semiconductor device of claim 6 , wherein the first UBM includes non-refractory metal and binary metal alloy.
11. The semiconductor device of claim 6 , wherein the first UBM includes non-refractory metal and refractory metal.
12. The semiconductor device of claim 6 , wherein the conductive layer is a redistribution layer.
13. A semiconductor device, comprising:
a semiconductor die;
a bond pad formed over a surface of the semiconductor die;
an insulating material disposed around a peripheral region of the semiconductor die;
a redistribution layer formed over the insulating material and electrically connected to the bond pad;
a first under bump metallization (UBM) formed contacting the insulating material and electrically connected to the redistribution layer; and
a bump formed over the bond pad.
14. The semiconductor device of claim 13 , wherein a surface of the insulating material is substantially coplanar with the surface of the semiconductor die.
15. The semiconductor device of claim 13 , further including a bump formed over the first UBM.
16. The semiconductor device of claim 13 , wherein the insulating material includes benzocyclobutene or polyimide.
17. The semiconductor device of claim 13 , further including a second UBM formed over the semiconductor die.
18. The semiconductor device of claim 13 , wherein the first UBM includes non-refractory metal and refractory metal.
19. A semiconductor device, comprising:
a semiconductor die;
an insulating material deposited around a peripheral region of the semiconductor die; and
a first under bump metallization (UBM) formed contacting the insulating material.
20. The semiconductor device of claim 19 , further including a conductive layer formed over the insulating material and electrically connected to the first UBM and a bond pad formed over a surface of the semiconductor die.
21. The semiconductor device of claim 19 , further including an interconnect structure formed over the first UBM.
22. The semiconductor device of claim 19 , wherein the insulating material includes benzocyclobutene or polyimide.
23. The semiconductor device of claim 19 , further including a second UBM formed over the semiconductor die.
24. The semiconductor device of claim 20 , wherein the insulating material is substantially coplanar with the surface of the semiconductor die.
25. The semiconductor device of claim 5 , further including an interconnect structure formed over the first UBM.
26. The semiconductor device of claim 5 , further including a second UBM formed over the semiconductor die.
27. The semiconductor device of claim 5 , wherein the first UBM includes non-refractory metal and binary metal alloy.
28. The semiconductor device of claim 5 , wherein the first UBM includes non-refractory metal and refractory metal.