High voltage transmit/receive switch and method therefor
View Patent ↗A two terminal transmit receive device passes small analog signals with a constant low resistance value to the input of a low noise, low voltage receiver amplifier and can protect the input against the high voltage transmit signals in ultrasound applications without the aid of any power supplies. The device uses depletion-mode transistors that are normally on to pass small analog signal and a voltage detection circuit that quickly turns off the depletion-mode transistors when the presence of high voltage is detected.
1. A two terminal high voltage transmit and receive protection switch comprising:
depletion-mode devices, the depletion-mode devices providing a low noise approximately constant resistance characteristic with zero biasing supplies when small signals are applied; and
a voltage detection circuit that turns off the depletion-mode devices and causes the two terminals to have characteristics of a low value constant current source when voltages more positive than approximately 2.0V or more negative than approximately −2.0V are applied to the terminals with respect to each other;
wherein the depletion-mode devices comprises:
a first high voltage N-channel depletion-mode transistor, a drain terminal of the first high voltage N-channel depletion-mode transistor connected to a first terminal of the two terminal high voltage transmit and receive protection switch, a gate terminal of the first high voltage N-channel depletion-mode transistor connected to the voltage detection circuit;
a switch block connected to the source terminal of the first high voltage N-channel depletion-mode transistor;
a second high voltage N-channel depletion-mode transistor, a drain terminal of the second high voltage N-channel depletion-mode transistor connected to a second terminal of the two terminal high voltage transmit and receive protection switch, a source terminal of the second high voltage N-channel depletion-mode transistor connected in series with the switch block, a gate terminal of the second high voltage N-channel depletion-mode transistor connected to the voltage detection circuit;
wherein the switch block comprises a low voltage P-channel JFET having a source terminal connected to the source terminal of the first high voltage N-channel depletion-mode transistor, a drain terminal of the P-channel JFET connected to the source terminal of the second high voltage N-channel depletion-mode transistor, and a gate terminal of the P-channel JFET connected to the voltage detection circuit;
wherein the gate terminal of the first high voltage N-channel depletion-mode MOSFET is connected to the source terminal of the second high voltage N-channel depletion-mode MOSFET, the gate terminal of the second high voltage N-channel depletion-mode MOSFET is connected to the source terminal of the first high voltage N-channel depletion-mode MOSFET, a voltage detection circuit comprises:
a first Zener diode coupled to the gate and source terminals of the low voltage P-channel JFET;
a first resistor coupled to source and gate terminals of the low voltage P-channel JFET;
a second resistor coupled to the drain and source terminals of the first high voltage N-channel depletion-mode transistor;
a first capacitor coupled to the drain and source terminals of the first high voltage N-channel depletion-mode transistor;
a second Zener diode coupled to the gate and drain terminals of the low voltage P-channel JFET;
a third resistor coupled to drain and gate terminals of the low voltage P-channel JFET;
a fourth resistor coupled to the drain and source terminals of the second high voltage N-channel depletion-mode transistor; and
a second capacitor coupled to the drain and source terminals of the second high voltage N-channel depletion-mode transistor.
2. A two terminal high voltage transmit and receive protection switch comprising depletion-mode devices, the depletion-mode devices providing a low noise approximately constant resistance characteristic with zero biasing supplies when small signals are applied; and a voltage detection circuit that turns off the depletion-mode devices and causes the two terminals to have characteristics of a low value constant current source when voltages more positive than approximately 2.0V or more negative than approximately −2.0V are applied to the terminals with respect to each other; wherein the depletion-mode devices comprises: a first high voltage N-channel depletion-mode transistor, a drain terminal of the first high voltage N-channel depletion-mode transistor connected to a first terminal of the two terminal high voltage transmit and receive protection switch, a gate terminal of the first high voltage N-channel depletion-mode transistor connected to the voltage detection circuit; a switch block connected to the source terminal of the first high voltage N-channel depletion-mode transistor; a second high voltage N-channel depletion-mode transistor, a drain terminal of the second high voltage N-channel depletion-mode transistor connected to a second terminal of the two terminal high voltage transmit and receive protection switch, a source terminal of the second high voltage N-channel depletion-mode transistor connected in series with the switch block, a gate terminal of the second high voltage N-channel depletion-mode transistor connected to the voltage detection circuit; wherein the switch block comprises two low voltage depletion-mode P-channel MOSFETs where a source terminal of a first low voltage depletion-mode P-channel MOSFET is connected to a source terminal of the first high voltage N-channel depletion-mode transistor, a drain terminal of the first low voltage depletion-mode P-channel MOSFET connected to a drain terminal of a second low voltage depletion-mode P-channel MOSFET, a source terminal of the second low voltage depletion-mode P-channel MOSFET connected to a source terminal of the second high voltage N-channel depletion-mode transistor, and gate terminals of the first and second low voltage depletion-mode P-channel MOSFET connected to the voltage detection circuit; wherein the voltage detection circuit comprises:
a third high voltage N-channel depletion-mode transistor, a drain terminal of the third high voltage N-channel depletion-mode transistor connected to the drain terminal of the first high voltage N-channel depletion-mode transistor, a gate terminal of the third high voltage N-channel depletion-mode transistor connected to the gate terminal of the first high voltage N-channel depletion-mode transistor and to the drain terminals of the first and second low voltage depletion-mode P-channel MOSFETs;
a first resistor coupled to the gate and source terminals of the third high voltage N-channel depletion-mode transistor and coupled to gate and drain terminals of the first low voltage depletion-mode P-channel MOSFET;
a first Zener diode coupled to the source and gate terminals of the third high voltage N-channel depletion-mode transistor;
a fourth high voltage N-channel depletion-mode transistor, a drain terminal of the fourth high voltage N-channel depletion-mode transistor connected to the drain terminal of the second high voltage N-channel depletion-mode transistor, a gate terminal of the fourth high voltage N-channel depletion-mode transistor connected to the gate terminal of the second high voltage N-channel depletion-mode transistor and to the drain terminals of the first and second low voltage depletion-mode P-channel MOSFETs;
a second resistor coupled to the gate and source terminals of the fourth high voltage N-channel depletion-mode transistor and coupled to gate and drain terminals of the second low voltage depletion-mode P-channel MOSFET;
a second Zener diode coupled the source and gate terminals of the fourth high voltage N-channel depletion-mode transistor.
3. A two terminal high voltage transmit and receive protection switch comprising:
a first high voltage N-channel depletion-mode transistor, a drain terminal of the first high voltage N-channel depletion-mode transistor connected to a first terminal of the two terminal high voltage transmit and receive protection switch;
a switch block connected in series to the source terminal of the first high voltage N-channel depletion-mode transistor;
a second high voltage N-channel depletion-mode transistor, a drain terminal of the second high voltage N-channel depletion-mode transistor connected to a second terminal of the two terminal high voltage transmit and receive protection switch and a source terminal of the second high voltage N-channel depletion-mode transistor connected in series with the switch block;
wherein switch block comprises two low voltage depletion-mode P-channel MOSFETs where a source terminal of a first low voltage depletion-mode P-channel MOSFET is connected to a source terminal of the first high voltage N-channel depletion-mode transistor, a drain terminal of the first low voltage depletion-mode P-channel MOSFET connected to a drain terminal of a second low voltage depletion-mode P-channel MOSFET, a source terminal of the second low voltage depletion-mode P-channel MOSFET connected to a source terminal of the second high voltage N-channel depletion-mode transistor, and gate terminals of the first and second low voltage depletion-mode P-channel MOSFET connected to the voltage detection circuit;
wherein the voltage detection circuit comprises:
a third high voltage N-channel depletion-mode transistor, a drain terminal of the third high voltage N-channel depletion-mode transistor connected to the drain of the first high voltage N-channel depletion-mode transistor;
a first resistor connected to a source terminal of the third high voltage N-channel depletion-mode transistor and to the source terminal of the first low voltage depletion-mode P-channel MOSFET;
a first Zener diode connected to the source terminal of the third high voltage N-channel depletion-mode transistor and to the source terminal of the first low voltage depletion-mode P-channel MOSFET;
a fourth high voltage N-channel depletion-mode transistor, a drain terminal of the fourth high voltage N-channel depletion-mode transistor connected to the drain of the second high voltage N-channel depletion-mode transistor;
a second resistor connected to a source terminal of the fourth high voltage N-channel depletion-mode transistor and to the source terminal of the second low voltage depletion-mode P-channel MOSFET;
a second Zener diode connected to the source terminal of the fourth high voltage N-channel depletion-mode transistor and to the source terminal of the second low voltage depletion-mode P-channel MOSFET.
4. A two terminal high voltage transmit and receive protection switch comprises: a first high voltage N-channel depletion-mode transistor, a drain terminal of the first high voltage N-channel depletion-mode transistor connected to a first terminal of the two terminal high voltage transmit and receive protection switch; a switch block connected in series to the source terminal of the first high voltage N-channel depletion-mode transistor; and a second high voltage N-channel depletion-mode transistor, a drain terminal of the second high voltage N-channel depletion-mode transistor connected to a second terminal of the two terminal high voltage transmit and receive protection switch and a source terminal of the second high voltage N-channel depletion-mode transistor connected in series with the switch block; wherein switch block comprises a low voltage P-channel JFET having a source terminal connected to the source terminal of the first high voltage N-channel depletion-mode transistor, a drain terminal of the P-channel JFET connected to the source terminal of the second high voltage N-channel depletion-mode transistor, and a gate terminal of the P-channel JFET connected to the voltage detection circuit:
a first Zener diode coupled to source and gate terminals of the low voltage P-channel JFET;
a first resistor coupled to source and gate terminals of the low voltage P-channel JFET;
a second resistor connected to the first resistor and to the drain terminal of the first high voltage N-channel depletion-mode transistor;
a first capacitor connected to the first resistor and to the drain terminal of the first high voltage N-channel depletion-mode transistor;
a second Zener diode coupled to drain and gate terminals of the low voltage P-channel JFET;
a third resistor coupled to drain and gate terminals of the low voltage P-channel JFET;
a fourth resistor connected to the third resistor and to the drain terminal of the second high voltage N-channel depletion-mode transistor; and
a second capacitor connected to the fourth resistor and to the drain terminal of the second high voltage N-channel depletion-mode transistor.
5. A two terminal high voltage transmit and receive protection switch comprising a first high voltage N-channel depletion-mode transistor, a drain terminal of the first high voltage N-channel depletion-mode transistor connected to a first terminal of the two terminal high voltage transmit and receive protection switch; a switch block connected in series to the source terminal of the first high voltage N-channel depletion-mode transistor; and a second high voltage N-channel depletion-mode transistor, a drain terminal of the second high voltage N-channel depletion-mode transistor connected to a second terminal of the two terminal high voltage transmit and receive protection switch and a source terminal of the second high voltage N-channel depletion-mode transistor connected in series with the switch block, wherein the voltage detection circuit comprises:
a third high voltage N-channel depletion-mode transistor, a drain terminal of the third high voltage N-channel depletion-mode transistor connected to the drain of the first high voltage N-channel depletion-mode transistor;
a first resistor connected to source and gate terminals of the third high voltage N-channel depletion-mode transistor and to the switch block;
a first Zener diode connected to the source and gate terminals of the third high voltage N-channel depletion-mode transistor and to the switch block;
a fourth high voltage N-channel depletion-mode transistor, a drain terminal of the fourth high voltage N-channel depletion-mode transistor connected to the drain of the second high voltage N-channel depletion-mode transistor;
a second resistor connected to source and gate terminals of the fourth high voltage N-channel depletion-mode transistor and to the switch block; and
a second Zener diode connected to the source and gate terminals of the fourth high voltage N-channel depletion-mode transistor and to the switch block.
6. A two terminal high voltage transmit and receive protection switch comprising a first high voltage N-channel depletion-mode transistor, a drain terminal of the first high voltage N-channel depletion-mode transistor connected to a first terminal of the two terminal high voltage transmit and receive protection switch; a switch block connected in series to the source terminal of the first high voltage N-channel depletion-mode transistor; and a second high voltage N-channel depletion-mode transistor, a drain terminal of the second high voltage N-channel depletion-mode transistor connected to a second terminal of the two terminal high voltage transmit and receive protection switch and a source terminal of the second high voltage N-channel depletion-mode transistor connected in series with the switch block; wherein switch block comprises a low voltage P-channel JFET having a source terminal connected to the source terminal of the first high voltage N-channel depletion-mode transistor, a drain terminal of the P-channel JFET connected to the source terminal of the second high voltage N-channel depletion-mode transistor, and a gate terminal of the P-channel JFET connected to the voltage detection circuit; wherein the voltage detection circuit comprises:
a first Zener diode connected to the switch block;
a first resistor connected to the switch block;
a second resistor connected to the first resistor and to the drain terminal of the first high voltage N-channel depletion-mode transistor;
a first capacitor connected to the first resistor and to the drain terminal of the first high voltage N-channel depletion-mode transistor;
a second Zener diode connected to the switch block;
a third resistor connected to the switch block;
a fourth resistor connected to the third resistor and to the drain terminal of the second high voltage N-channel depletion-mode transistor; and
a second capacitor connected to the fourth resistor and to the drain terminal of the second high voltage N-channel depletion-mode transistor.