Through silicon via lithographic alignment and registration
View Patent ↗A method of manufacturing an integrated circuit structure forms a first opening in a substrate and lines the first opening with a protective liner. The method deposits a material into the first opening and forms a protective material over the substrate. The protective material includes a process control mark and includes a second opening above, and aligned with, the first opening. The method removes the material from the first opening through the second opening in the protective material. The process control mark comprises a recess within the protective material that extends only partially through the protective material, such that portions of the substrate below the process control mark are not affected by the process of removing the material.
1. A method of manufacturing an integrated circuit structure, said method comprising:
forming a first opening in a substrate, said opening having a specified length, width, and depth;
filling said first opening with at least one fill material;
patterning a protective material over said substrate, said protective material including a process control mark and including a second opening above, and aligned with, said first opening; and
removing said fill material from said first opening through said second opening in said protective material,
said process control mark comprising a recess within said protective material that extends only partially through said protective material, such that portions of said substrate below said process control mark are not affected by said removing of said fill material.
2. The method according to claim 1 , wherein said process control mark does not extend completely through said protective material.
3. The method according to claim 1 , said protective material protects portions of said substrate that are not beneath said second opening.
4. The method according to claim 1 , said removing of said fill material comprising a process that would damage said substrate, and said protective material protects said substrate from said removing of said fill material.
5. The method according to claim 1 , said process control mark being formed above a kerf region of said substrate.
6. A method of manufacturing an integrated circuit structure, said method comprising:
forming a first opening in a silicon substrate;
depositing a polysilicon material into said first opening;
patterning an organic photoresist over said silicon substrate, said organic photoresist including a process control mark and including a second opening above, and aligned with, said first opening; and
performing reactive ion etching to remove said polysilicon material from said first opening through said second opening in said organic photoresist,
said process control mark comprising a recess within said organic photoresist that extends only partially through said organic photoresist, such that portions of said silicon substrate below said process control mark are not affected by said reactive ion etching.
7. The method according to claim 6 , wherein said process control mark does not extend completely through said organic photoresist.
8. The method according to claim 6 , said organic photoresist protects portions of said silicon substrate that are not beneath said second opening.
9. The method according to claim 6 , said reactive ion etching comprising a process that would damage said silicon substrate, and said organic photoresist and said oxide liner protect said silicon substrate from said removing of said fill material.
10. The method according to claim 6 , said process control mark being formed above a kerf region of said silicon substrate.