Manufacturing method for double-side capacitor of stack DRAM
View Patent ↗A manufacturing method for double-side capacitor of stack DRAM has steps of: forming a sacrificial structure in the isolating trench and the capacitor trenches; forming a first covering layer and a second covering layer on the sacrificial structure; modifying a part of the second covering layer; removing the un-modified second covering layer and the first covering layer to expose the sacrificial structure; removing the exposed part of the sacrificial structure to expose the electrode layer; removing the exposed electrode layer to expose the oxide layer; and removing the oxide layer and sacrificial structure to form the double-side capacitors.
1. A manufacturing method for double-side capacitor of stack DRAM comprising steps of:
forming an isolating trench and a plurality of capacitor trenches in an oxide layer wherein each of the isolating trench and the capacitor trenches has an electrode layer on a sidewall thereof;
forming a sacrificial structure in the isolating trench and the capacitor trenches, respectively;
forming a first covering layer and a second covering layer on the sacrificial structure;
modifying a part of the second covering layer on the sacrificial structure of the capacitor trenches, and modifying the second covering layer on the sacrificial structure of the isolating trench;
removing the un-modified second covering layer on the sacrificial structure of the capacitor trenches, then removing the first covering layer under the un-modified second covering layer on the sacrificial structure of the capacitor trenches to expose the sacrificial structure of the capacitor trenches;
removing a part of the sacrificial structure of the capacitor trenches to expose the electrode layer on the sidewall of the capacitor trenches;
removing the exposed electrode layer on the sidewall of the capacitor trenches to expose the oxide layer; and
removing the sacrificial structure in the isolating trench and the capacitor trenches, and removing the oxide layer between the capacitor trenches so that the electrode layers of the capacitor trenches are constructed as a plurality of double-side capacitors.
2. The manufacturing method according to claim 1 , wherein the oxide layer has a supporting layer thereon, and the isolating trench and the capacitor trenches are formed in the supporting layer and the oxide layer.
3. The manufacturing method according to claim 2 , wherein each of the isolating trench and the capacitor trenches has the electrode layer on a bottom thereof in the step of forming an isolating trench and a plurality of capacitor trenches in an oxide layer.
4. The manufacturing method according to claim 2 , wherein the step of forming a sacrificial structure in the isolating trench and the capacitor trenches includes an etching back step to etch the sacrificial structure so that a top of the sacrificial structure is lowered to a bottom of the supporting layer.
5. The manufacturing method according to claim 4 , wherein the first covering layer and the second covering layer are formed on the sacrificial structure and the supporting layer in the step of forming a first covering layer and a second covering layer on the sacrificial structure.
6. The manufacturing method according to claim 5 , wherein the step of modifying a part of the second covering layer on the sacrificial structure of the capacitor trenches includes steps of:
providing a one-direction ion implanting step, wherein ions are implanted inclinedly to the part of the second covering layer on the sacrificial structure of the capacitor trenches, and are implanted to the second covering layer on the supporting layer;
blocking the second covering layer on the sacrificial structure of the capacitor trenches; and
providing a full-direction ion implanting step, wherein ions are implanted to the second covering layer on the sacrificial structure of the isolating trench so that the second covering layer on the sacrificial structure of the isolating trench is modified.
7. The manufacturing method according to claim 6 , wherein the step of blocking the second covering layer on the sacrificial structure of the capacitor trenches provides a photoresist on the second covering layer on the sacrificial structure of the capacitor trenches.
8. The manufacturing method according to claim 6 , wherein the un-modified second covering layer on the sacrificial structure of the capacitor trenches has a higher etching rate than the modified second covering layer, and the un-modified second covering layer on the sacrificial structure of the capacitor trenches is removed by a etching method is the step of removing the un-modified second covering layer on the sacrificial structure of the capacitor trenches.
9. The manufacturing method according to claim 8 , wherein the part of the sacrificial structure of the capacitor trenches and the modified second covering layer on the sacrificial structure of the capacitor trenches are etched in the step of removing a part of the sacrificial structure of the capacitor trenches to expose the electrode layer.
10. The manufacturing method according to claim 9 , wherein the step of removing the exposed electrode layer includes a step of removing the first covering layer.
11. The manufacturing method according to claim 10 , wherein the first covering layer is removed by a dry etching method.
12. The manufacturing method according to claim 1 , wherein the first covering layer is a silicon nitride layer, the second covering layer is a ploy-silicon layer, the electrode layer is a metal layer of titanium nitride, and a metal layer of titanium is further formed under the electrode layer on the bottom of isolating trench and the capacitor trenches.
13. A manufacturing method for double-side capacitor of stack DRAM comprising steps of:
forming an isolating trench and a plurality of capacitor trenches in an oxide layer wherein each of the isolating trench and the capacitor trenches has an electrode layer on a sidewall thereof;
forming a sacrificial structure in the isolating trench and the capacitor trenches, respectively;
forming a first covering layer and a second covering layer on the sacrificial structure;
providing an one-direction ion implanting step, wherein ions are implanted inclinedly to the part of the second covering layer on the sacrificial structure of the capacitor trenches, and are implanted to the second covering layer on the supporting layer;
blocking the second covering layer on the sacrificial structure of the capacitor trenches;
providing a full-direction ion implanting step, wherein ions are implanted to the second covering layer on the sacrificial structure of the isolating trench so that the second covering layer on the sacrificial structure of the isolating trench is modified;
removing the un-modified second covering layer on the sacrificial structure of the capacitor trenches, then removing the first covering layer under the un-modified second covering layer on the sacrificial structure of the capacitor trenches to expose the sacrificial structure of the capacitor trenches;
removing a part of the sacrificial structure of the capacitor trenches to expose the electrode layer on the sidewall of the capacitor trenches;
removing the exposed electrode layer on the sidewall of the capacitor trenches to expose the oxide layer; and
removing the sacrificial structure in the isolating trench and the capacitor trenches, and removing the oxide layer between the capacitor trenches so that the electrode layers of the capacitor trenches are constructed as a plurality of double-side capacitors.
14. The manufacturing method according to claim 13 , wherein the oxide layer has a supporting layer thereon, and the isolating trench and the capacitor trenches are formed in the supporting layer and the oxide layer.
15. The manufacturing method according to claim 14 , wherein each of the isolating trench and the capacitor trenches has the electrode layer on a bottom thereof in the step of forming an isolating trench and a plurality of capacitor trenches in an oxide layer; and the step of forming a sacrificial structure in the isolating trench and the capacitor trenches includes an etching back step to etch the sacrificial structure so that a top of the sacrificial structure is lowered to a bottom of the supporting layer.
16. The manufacturing method according to claim 15 , wherein the first covering layer and the second covering layer are formed on the sacrificial structure and the supporting layer in the step of forming a first covering layer and a second covering layer on the sacrificial structure.
17. The manufacturing method according to claim 16 , wherein the step of blocking the second covering layer on the sacrificial structure of the capacitor trenches provides a photoresist on the second covering layer on the sacrificial structure of the capacitor trenches; and wherein the un-modified second covering layer on the sacrificial structure of the capacitor trenches has a higher etching rate than the modified second covering layer, and the un-modified second covering layer on the sacrificial structure of the capacitor trenches is removed by a etching method is the step of removing the un-modified second covering layer on the sacrificial structure of the capacitor trenches.
18. The manufacturing method according to claim 17 , wherein the part of the sacrificial structure of the capacitor trenches and the modified second covering layer on the sacrificial structure of the capacitor trenches are etched in the step of removing a part of the sacrificial structure of the capacitor trenches to expose the electrode layer.
19. The manufacturing method according to claim 18 , wherein the step of removing the exposed electrode layer includes a step of removing the first covering layer by a dry etching method.
20. The manufacturing method according to claim 13 , wherein the first covering layer is a silicon nitride layer, the second covering layer is a ploy-silicon layer, the electrode layer is a metal layer of titanium nitride, and a metal layer of titanium is further formed under the electrode layer on the bottom of isolating trench and the capacitor trenches.