IP Library Granted Patent US 9,922,955
Granted Patent B2
US 9,922,955 · App. 12/717,335 · Granted Mar 20, 2018

Semiconductor device and method of forming package-on-package structure electrically interconnected through TSV in WLCSP

Inventors: Zigmund R. Camacho (Singapore, SG); Dioscoro A. Merilo (Singapore, SG); Lionel Chien Hui Tay (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd.
H01L25/0657H01L21/4853H01L23/49816H01L23/52H01L24/96H01L24/73H01L2224/16145H01L2224/16225H01L2224/32145H01L2224/32225H01L2224/48091H01L2224/48227H01L2224/48472H01L2224/73204H01L2224/73265H01L2924/01322H01L2924/13091H01L2924/14H01L2924/15311H01L2924/15331H01L2924/18161
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Quick Facts
Patent No.
US 9,922,955
App. No.
12/717,335
Granted
Mar 20, 2018
Kind
B2
Abstract

A semiconductor wafer has a plurality of semiconductor die. First and second conductive layers are formed over opposing surfaces of the semiconductor die, respectively. Each semiconductor die constitutes a WLCSP. A TSV is formed through the WLCSP. A semiconductor component is mounted to the WLCSP. The first semiconductor component is electrically connected to the first conductive layer. A first bump is formed over the first conductive layer, and a second bump is formed over the second conductive layer. An encapsulant is deposited over the first bump and first semiconductor component. A second semiconductor component is mounted to the first bump. The second semiconductor component is electrically connected to the first semiconductor component and WLCSP through the first bump and TSV. A third semiconductor component is mounted to the first semiconductor component, and a fourth semiconductor component is mounted to the third semiconductor component.

Claims (37)

1. A method of making a semiconductor device, comprising:

providing a semiconductor wafer including a plurality of semiconductor die;

forming a first conductive layer over an active surface of the semiconductor die including active devices;

forming a second conductive layer over a second surface of the semiconductor die opposite the active surface of the semiconductor die such that each semiconductor die constitutes a wafer level chip scale package (WLCSP);

forming a conductive through silicon via (TSV) through the active surface of the WLCSP;

mounting a first semiconductor component to the WLCSP;

electrically connecting the first semiconductor component to the first conductive layer;

forming a first bump over the first conductive layer;

mounting a second semiconductor component to the first bump and electrically connecting the second semiconductor component to the first semiconductor component and WLCSP through the first bump and TSV; and

singulating the semiconductor wafer after mounting the second semiconductor component.

2. The method of claim 1 , further including depositing an encapsulant over the first bump and first semiconductor component.

3. The method of claim 2 , further including removing a portion of the encapsulant to expose the first bump.

4. The method of claim 1 , wherein the first semiconductor component is electrically connected to the first conductive layer by bond wire or bump.

5. The method of claim 1 , further including forming a second bump over the second conductive layer.

6. The method of claim 1 , further including mounting a third semiconductor component to the first semiconductor component.

7. The method of claim 6 , further including mounting a fourth semiconductor component to the third semiconductor component.

8. A method of making a semiconductor device, comprising:

providing a semiconductor wafer including a plurality of semiconductor die;

forming a first conductive layer over an active surface of the semiconductor die, each semiconductor die constituting a wafer level chip scale package (WLCSP);

forming a conductive through silicon via (TSV) through the WLCSP;

mounting a first semiconductor component to the WLCSP;

forming a first interconnect structure over the first conductive layer;

mounting a second semiconductor component to the first interconnect structure and electrically connecting the second semiconductor component to the first semiconductor component and WLCSP through the first interconnect structure and TSV; and

singulating the semiconductor wafer after mounting the second semiconductor component.

9. The method of claim 8 , further including depositing an encapsulant over the first interconnect structure and first semiconductor component.

10. The method of claim 9 , further including removing a portion of the encapsulant to expose the first interconnect structure.

11. The method of claim 8 , wherein the first interconnect structure includes a bump or pillar.

12. The method of claim 8 , further including electrically connecting the first semiconductor component to the first conductive layer by bond wire or bump.

13. The method of claim 8 , further including:

forming a second conductive layer over a second surface of the semiconductor die opposite the active surface of the semiconductor die; and

forming a second interconnect structure over the second conductive layer.

14. The method of claim 8 , further including:

mounting a third semiconductor component to the first semiconductor component; and

mounting a fourth semiconductor component to the third semiconductor component.

15. The method of claim 1 , further including depositing an encapsulant over the first semiconductor component.

16. The method of claim 8 , further including depositing an encapsulant over the first semiconductor component.

17. The method of claim 8 , further including mounting a third semiconductor component to the first semiconductor component.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0427 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2010
From: CAMACHO, ZIGMUND R.; MERILO, DIOSCORO A.; TAY, LIONEL CHIEN HUI
To: STATS CHIPPAC, LTD.
Reel/Frame 024028/0637 →
Continuity (1)
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