IP Library Granted Patent US 8,633,056
Granted Patent B2
US 8,633,056 · App. 12/723,596 · Granted Jan 21, 2014

Integrated circuit package system and method of manufacture thereof

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Quick Facts
Patent No.
US 8,633,056
App. No.
12/723,596
Granted
Jan 21, 2014
Kind
B2
Abstract

A method of manufacture of an integrated circuit package system includes forming a substrate with a device thereover, forming an encapsulation having a planar top surface to cover the device and the substrate spanning to an extraction side of the encapsulation, and forming a recess in the encapsulation from the planar top surface.

Claims (34)

1. A method of manufacture of an integrated circuit package system comprising:

forming a substrate with a device thereover;

forming an encapsulation having a planar top surface to cover the device;

forming a nonorthogonal lower segment having a nonorthogonal substrate sidewall with a straight surface bounded and beveled between a first surface of the substrate opposing a second surface of the substrate, a contact of the substrate exposed from the nonorthogonal lower segment and the substrate spans from an end at an extraction side to another end at an insertion side; and

forming a recess in the encapsulation from the planar top surface, the recess having a first planar surface connected to a second planar surface to form an acute angle therebetween.

2. The method as claimed in claim 1 wherein forming the recess includes molding a chamfered cut or a groove next to the extraction side with a mold cap.

3. The method as claimed in claim 1 wherein forming the recess includes cutting a chamfered cut or a groove next to the extraction side with an angled blade.

4. The method as claimed in claim 1 wherein forming the nonorthogonal lower segment includes exposing a portion of the substrate at the insertion side.

5. The method as claimed in claim 1 further comprising forming a nonorthogonal upper segment with the encapsulation at the insertion side.

6. A method of manufacture of an integrated circuit package system comprising:

forming a substrate having a first surface opposing a second surface;

mounting a first device over the first surface;

forming an encapsulation having a planar top surface to cover the first device;

forming a recess in the encapsulation from the planar top surface next to the extraction side, the recess having a first planar surface connected to a second planar surface to form an acute angle therebetween; and

forming a nonorthogonal lower segment having a nonorthogonal substrate sidewall with a straight surface bounded and beveled between the first surface of the substrate and the second surface of the substrate, a contact of the substrate exposed from the nonorthogonal lower segment and the substrate spans from an end at an extraction side to another end at an insertion side.

7. The method as claimed in claim 6 wherein mounting the first device includes mounting a passive component.

8. The method as claimed in claim 6 wherein mounting the first device includes mounting an integrated circuit die.

9. The method as claimed in claim 6 wherein forming the first device includes forming a communication access device, a storage device, or an identity verification device.

10. An integrated circuit package system comprising:

a substrate;

a device over the substrate;

an encapsulation, having a planar top surface and a recess from the planar top surface with the recess having a first planar surface connected to a second planar surface to form an acute angle therebetween, the encapsulation covering the device; and

a nonorthogonal lower segment having a nonorthogonal substrate sidewall with a straight surface bounded and beveled between a first surface of the substrate opposing a second surface of the substrate, a contact of the substrate exposed from the nonorthogonal lower segment and the substrate spans from an end at an extraction side to another end at an insertion side.

11. The system as claimed in claim 10 wherein the recess is a chamfered cut next to the extraction side.

12. The system as claimed in claim 10 wherein the recess is a groove next to the extraction side.

13. The system as claimed in claim 10 wherein the nonorthogonal lower segment includes a portion of the substrate exposed at the insertion side.

14. The system as claimed in claim 10 further comprising a nonorthogonal upper segment with the encapsulation at the insertion side.

15. The system as claimed in claim 10 wherein:

the device is over the substrate and attached to the first surface;

the encapsulation, having the planar top surface and the recess from the planar top surface, is comprised of a mold resin to cover the device and the substrate spanning to the extraction side of the encapsulation; and

the nonorthogonal lower segment includes a portion of the substrate exposed at the insertion side.

16. The system as claimed in claim 15 wherein the device is a passive component.

17. The system as claimed in claim 15 wherein the device is an integrated circuit die.

18. The system as claimed in claim 15 wherein the device is a communication access device, a storage device, or an identity verification device.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE>" TO "STATS CHIPPAC PTE. LTD" PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0219. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0300 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →