Backside dummy plugs for 3D integration
View Patent ↗A semiconductor structure includes backside dummy plugs embedded in a substrate. The backside dummy plugs can be a conductive structure that enhances vertical thermal conductivity of the semiconductor structure and provides electrical decoupling of signals in through-substrate vias (TSVs) in the substrate. The backside dummy plug can include a cavity to accommodate volume changes in other components in the substrate, thereby alleviating mechanical stress in the substrate during thermal cycling and operation of the semiconductor chip. The backside dummy plug including the cavity can be composed of an insulator material or a conductive material. The inventive structures can be employed to form three-dimensional structures having vertical chip integration, in which inter-wafer thermal conductivity is enhanced, cross-talk between signals through TSVs is reduced, and/or mechanical stress to the TSVs is reduced.
1. A semiconductor structure comprising:
a substrate including a semiconductor layer and an interconnect dielectric layer, wherein at least one semiconductor device is located at an interface between said semiconductor layer and said interconnect dielectric layer;
a through-substrate via (TSV) structure embedded in said substrate, said TSV structure comprising a conductive via material and extending at least from said interface to a back side surface of said substrate; and
at least one backside dummy plug embedded in said substrate, said at least one backside dummy plug extending from said back side surface to a depth into said substrate, wherein said depth is less than a vertical distance between said back side surface and said interface, wherein at least one of said at least one backside dummy plug is filled with a conductive fill material that is separated and electrically insulated from the conductive via material of the TSV structure.
2. The semiconductor structure of claim 1 , wherein said at least one backside dummy plug is a plurality of backside dummy plugs.
3. The semiconductor structure of claim 1 , wherein said depth is between 10% and 90% of said vertical distance between said back side surface and said interface.
4. The semiconductor structure of claim 1 , wherein said conductive fill material is selected from an elemental metal, an intermetallic alloy, a conductive metal nitride, a doped semiconductor material, and a combination thereof.
5. The semiconductor structure of claim 1 , wherein said at least one backside dummy plug is completely filled with said conductive fill material.
6. The semiconductor structure of claim 5 , wherein each of said at least one backside dummy plug completely fills a trench extending from said back side surface into said substrate, and said trench has a horizontal cross-sectional area that decreases with distance from said back side surface or is substantially constant with distance from said back side surface.
7. The semiconductor structure of claim 1 , wherein said at least one backside dummy plug is partially filled with said conductive material, wherein each of said at least one backside dummy plug includes a cavity encapsulated by said conductive material.
8. The semiconductor structure of claim 7 , wherein each of said at least one backside dummy plug partially fills a trench extending from said back side surface into said substrate, said cavity is located in said trench, and said trench has a horizontal cross-sectional area that decreases with distance from said back side surface or is substantially constant with distance from said back side surface.
9. The semiconductor structure of claim 7 , wherein each of said at least one backside dummy plug partially fills a trench extending from said back side surface into said substrate, said cavity is located in said trench, and a distance from said back side surface exists at which said trench has a greater horizontal cross-sectional area than a horizontal cross-sectional area at a lesser distance from said back side surface.
10. The semiconductor structure of claim 1 , wherein said at least one plug comprises a dielectric material.
11. The semiconductor structure of claim 10 , wherein said at least one backside dummy plug is partially filled with said dielectric material, wherein each of said at least one backside dummy plug includes a cavity encapsulated by said dielectric material.
12. The semiconductor structure of claim 11 , wherein each of said at least one backside dummy plug partially fills a trench extending from said back side surface into said substrate, said cavity is located in said trench, and said trench has a horizontal cross-sectional area that decreases with distance from said back side surface or is substantially constant with distance from said back side surface.
13. The semiconductor structure of claim 11 , wherein each of said at least one backside dummy plug partially fills a trench extending from said back side surface into said substrate, said cavity is located in said trench, and a distance from said back side surface exists at which said trench has a greater horizontal cross-sectional area than a horizontal cross-sectional area at a lesser distance from said back side surface.
14. The semiconductor structure of claim 1 , wherein said TSV structure is electrically isolated from said substrate, and said at least one backside dummy plug is embedded in a semiconductor material layer and is not electrically shorted to any portion of said semiconductor material layer.
15. The semiconductor structure of claim 1 , wherein an end surface of said TSV and an end surface of each of said at least one backside dummy plug is coplanar with said back side surface of said substrate.
16. The semiconductor structure of claim 1 , further comprising another substrate bonded to a front side surface of said substrate, wherein said substrate includes a first bonding pad located on said front side of said substrate and bonded to a second bonding pad located on said another substrate, and said TSV structure is electrically shorted to said first bonding pad and said second bonding pad.